{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,2]],"date-time":"2025-08-02T19:20:40Z","timestamp":1754162440411,"version":"3.41.2"},"reference-count":9,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,7,7]],"date-time":"2025-07-07T00:00:00Z","timestamp":1751846400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,7,7]],"date-time":"2025-07-07T00:00:00Z","timestamp":1751846400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,7,7]]},"DOI":"10.1109\/smacd65553.2025.11092257","type":"proceedings-article","created":{"date-parts":[[2025,7,29]],"date-time":"2025-07-29T18:20:27Z","timestamp":1753813227000},"page":"1-4","source":"Crossref","is-referenced-by-count":0,"title":["Modeling and Analysis of MS Accelerators Embedding SRAM and RRAM Compute Cells"],"prefix":"10.1109","author":[{"given":"Michele","family":"Caselli","sequence":"first","affiliation":[{"name":"University of Parma,Department of Engineering and Architecture"}]},{"given":"Andrea","family":"Boni","sequence":"additional","affiliation":[{"name":"University of Parma,Department of Engineering and Architecture"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2020.3020286"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2022.3174622"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JXCDC.2023.3309713"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MCAS.2021.3092533"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/SMACD58065.2023.10192111"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2805470"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM13553.2020.9372019"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/PRIME58259.2023.10161781"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/SMACD61181.2024.10745459"}],"event":{"name":"2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD)","start":{"date-parts":[[2025,7,7]]},"location":"Istanbul, Turkiye","end":{"date-parts":[[2025,7,10]]}},"container-title":["2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11091816\/11091606\/11092257.pdf?arnumber=11092257","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,30]],"date-time":"2025-07-30T05:34:14Z","timestamp":1753853654000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11092257\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,7,7]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/smacd65553.2025.11092257","relation":{},"subject":[],"published":{"date-parts":[[2025,7,7]]}}}