{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,2]],"date-time":"2026-07-02T23:40:15Z","timestamp":1783035615717,"version":"3.54.6"},"reference-count":84,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,11]]},"DOI":"10.1109\/smartcomp.2014.7043841","type":"proceedings-article","created":{"date-parts":[[2015,2,20]],"date-time":"2015-02-20T15:27:39Z","timestamp":1424446059000},"page":"66-73","source":"Crossref","is-referenced-by-count":76,"title":["Garbage collection and wear leveling for flash memory: Past and future"],"prefix":"10.1109","author":[{"given":"Ming-Chang","family":"Yang","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yu-Ming","family":"Chang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Che-Wei","family":"Tsao","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Po-Chun","family":"Huang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yuan-Hao","family":"Chang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Tei-Wei","family":"Kuo","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref73","doi-asserted-by":"publisher","DOI":"10.1145\/146941.146943"},{"key":"ref72","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757458"},{"key":"ref71","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2011.5937225"},{"key":"ref70","doi-asserted-by":"publisher","DOI":"10.1109\/ISdea.2012.438"},{"key":"ref76","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2014.6783376"},{"key":"ref77","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2007.4339708"},{"key":"ref74","doi-asserted-by":"publisher","DOI":"10.1145\/146941.146943"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/2611757"},{"key":"ref75","article-title":"Non-volatile memory technologies for beyond","author":"shin","year":"2010","journal-title":"VLSI '05"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/MASCOTS.2011.50"},{"key":"ref78","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488938"},{"key":"ref79","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228405"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ICAT.2006.31"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/1450135.1450141"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1002\/(SICI)1097-024X(199903)29:3<267::AID-SPE233>3.0.CO;2-T"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1002\/(SICI)1097-024X(199903)29:3<267::AID-SPE233>3.0.CO;2-T"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1007\/11833529_11"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1007\/11833529_11"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/1508244.1508271"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669118"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1145\/2245276.2232028"},{"key":"ref62","article-title":"Dual Greedy: Adaptive Garbage Collection for Page-Mapping Solid-State Disks","author":"lin","year":"2012","journal-title":"Design Automation and Test in Europe (DATE)"},{"key":"ref61","doi-asserted-by":"publisher","DOI":"10.14778\/1920841.1920990"},{"key":"ref63","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2010.5505987"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1016\/S0164-1212(99)00059-X"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1016\/j.mee.2008.08.007"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2012.6478963"},{"key":"ref65","doi-asserted-by":"publisher","DOI":"10.1109\/ICSICT.2012.6466681"},{"key":"ref66","doi-asserted-by":"publisher","DOI":"10.1145\/2512961"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1016\/S0164-1212(99)00059-X"},{"key":"ref67","article-title":"Micron Technology, Inc","year":"2009","journal-title":"Micron MT29FXXG08CXXXX Asynchronous MLC Flash Memory Datasheet"},{"key":"ref68","article-title":"Samsung Electronics","year":"2007","journal-title":"Samsung K9F8G08UXM SLC Flash Memory Datasheet"},{"key":"ref69","article-title":"SanDisk Corporation","year":"2010","journal-title":"SanDisk 32nm 32Gb eX3 8LC Flash Memory Datasheet"},{"key":"ref2","article-title":"Understanding the Flash Translation Layer (FTL) Specification","year":"1998","journal-title":"Technical report Intel Corporation"},{"key":"ref1","article-title":"Flash-memory Translation Layer for NAND flash (NFTL)","year":"1998","journal-title":"M-Systems"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/1879021.1879045"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691152"},{"key":"ref21","article-title":"On Trading Wear-levleing with Heal-leveling","author":"chang","year":"2014","journal-title":"ACM\/IEEE Design Automation Conference (DAC)"},{"key":"ref24","article-title":"CAFTL: A Content-Aware Flash Translation Layer Enhancing the Lifespan of Flash Memory based Solid State Drives","author":"chen","year":"2012","journal-title":"Proc USENIX Conf File and Storage Technologies (FAST)"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2012.6242476"},{"key":"ref26","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1109\/TC.2014.2345407","article-title":"On-Demand Block-Level Address Mapping in Large-Scale NAND Flash Storage Systems","volume":"pp","author":"chen","year":"2014","journal-title":"Computers IEEE Transactions on"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/CODES-ISSS.2013.6658994"},{"key":"ref50","article-title":"Pipe-shaped bics flash memory with 16 stacked layers and multi-level-cell operation for ultra high density storage devices","author":"katsumata","year":"0","journal-title":"VLSIT '09"},{"key":"ref51","first-page":"155","article-title":"A Flash-Memory Based File System","author":"kawaguchi","year":"1995","journal-title":"the 1995 USENIX Technical Conference"},{"key":"ref59","doi-asserted-by":"publisher","DOI":"10.1145\/1275986.1275990"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2012.227"},{"key":"ref57","first-page":"57:1","article-title":"Garbage collection for multi-version index on flash memory","author":"lam","year":"2014","journal-title":"Proceedings of the Design Automation & Test in Europe Conference DATE"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4694174"},{"key":"ref55","article-title":"Multi-layered vertical gate NAND flash overcoming stacking limit for terabit density storage","author":"kim","year":"0","journal-title":"VLSIT '09"},{"key":"ref54","article-title":"A Space-Efficient Flash Translation Layer For CompactFlash Systems","author":"kim","year":"2002","journal-title":"IEEE Transactions on Consumer Electronics"},{"key":"ref53","article-title":"Novel vertical-stacked-array-transistor (VSAT) for ultra-high-density and cost-effective NAND flash memory devices and SSD (solid state drive)","author":"kim","year":"0","journal-title":"VLSIT '09"},{"key":"ref52","first-page":"284","article-title":"A New Flash Memory Management for Flash Storage System","author":"kim","year":"1999","journal-title":"Proceedings Computer Software and Applications Conference"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.33"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2508148.2485962"},{"key":"ref40","article-title":"Randomized Garbage Collection for Flash Storage Systems","author":"huang","year":"2013","journal-title":"International Workshop on Non-Volatile Memory (INVM)"},{"key":"ref12","article-title":"Memory architecture of 3d vertical gate (3dvg) nand flash using plural island-gate ssl decoding method and study of it's program inhibit characteristics","author":"chang","year":"0","journal-title":"IMW '12"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/1244002.1244248"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/1244002.1244248"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2009.4796578"},{"key":"ref82","first-page":"29.7.1","article-title":"Novel 3-dimensional dual control-gate with surrounding floating-gate (DC-SF) NAND flash cell for 1Tb file storage application","author":"whang","year":"2010","journal-title":"IEDM'10"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/RTTAS.2002.1137393"},{"key":"ref81","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176694"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/1111609.1111610"},{"key":"ref84","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488936"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/2093139.2093142"},{"key":"ref83","doi-asserted-by":"publisher","DOI":"10.1145\/2380445.2380521"},{"key":"ref19","article-title":"Endurance Enhancement of Flash-Memory Storage Systems: An Efficient Static Wear Leveling Design","author":"chang","year":"2007","journal-title":"ACM\/IEEE Design Automation Conference (DAC)"},{"key":"ref80","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228405"},{"key":"ref4","article-title":"Increasing Flash Solid State Disk Reliability","year":"2005","journal-title":"Technical Report SiliconSystems"},{"key":"ref3","article-title":"How to Use the FTL and HAL Software Modules to Manage Data in NAND Flash Memories","year":"2004","journal-title":"STMicroelectronics Technical Report"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2013.2247606"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/GLOCOMW.2010.5700261"},{"key":"ref8","article-title":"Wear Leveling of Static Areas in Flash Memory","author":"ban","year":"2004","journal-title":"US Patent"},{"key":"ref7","article-title":"Flash File System","author":"ban","year":"1995","journal-title":"US Patent"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1145\/1289927.1289953"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/s007780050028"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2006.1649669"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1145\/1982185.1982264"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1145\/2480362.2480639"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-35170-9_9"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2012.6227449"},{"key":"ref41","article-title":"Vertical cell array using TCAT (terabit cell array transistor) technology for ultra high density NAND flash memory","author":"jang","year":"0","journal-title":"VLSIT '09"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1007\/s10617-013-9123-4"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2010.5681112"}],"event":{"name":"2014 International Conference on Smart Computing (SMARTCOMP)","location":"Hong Kong, Hong Kong","start":{"date-parts":[[2014,11,3]]},"end":{"date-parts":[[2014,11,5]]}},"container-title":["2014 International Conference on Smart Computing"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7031549\/7043829\/07043841.pdf?arnumber=7043841","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,20]],"date-time":"2019-08-20T23:46:47Z","timestamp":1566344807000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7043841\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,11]]},"references-count":84,"URL":"https:\/\/doi.org\/10.1109\/smartcomp.2014.7043841","relation":{},"subject":[],"published":{"date-parts":[[2014,11]]}}}