{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,11]],"date-time":"2026-02-11T21:46:13Z","timestamp":1770846373848,"version":"3.50.1"},"reference-count":13,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,10,5]],"date-time":"2025-10-05T00:00:00Z","timestamp":1759622400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,10,5]],"date-time":"2025-10-05T00:00:00Z","timestamp":1759622400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,10,5]]},"DOI":"10.1109\/smc58881.2025.11342557","type":"proceedings-article","created":{"date-parts":[[2026,1,29]],"date-time":"2026-01-29T21:18:24Z","timestamp":1769721504000},"page":"5017-5022","source":"Crossref","is-referenced-by-count":0,"title":["Memory-Priority Scheduling for Digital Simulation Model of Security and Stability Control Systems on a Multi-core System"],"prefix":"10.1109","author":[{"given":"Dingyu","family":"Hu","sequence":"first","affiliation":[{"name":"Northwestern Polytechnical University,School Of Software,Xi&#x2019;an,China,710129"}]},{"given":"Zhi","family":"Wang","sequence":"additional","affiliation":[{"name":"Northwestern Polytechnical University,School Of the School of Computer Science and Engineering,Xi&#x2019;an,China,710129"}]},{"given":"Bo","family":"Shen","sequence":"additional","affiliation":[{"name":"Northwestern Polytechnical University,School Of the School of Computer Science and Engineering,Xi&#x2019;an,China,710129"}]},{"given":"Meikang","family":"Qiu","sequence":"additional","affiliation":[{"name":"Augusta University,Augusta,US,30904"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2024.103069"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/EI256261.2022.10116862"},{"key":"ref3","article-title":"A categorization of real-time multiprocessor scheduling problems and algorithms","author":"Carpenter","year":"2004"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ECRTS.2005.18"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/REAL.1991.160366"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2021.3111512"},{"key":"ref7","first-page":"101","article-title":"Towards wcet analysis of multicore architectures using uppaal","volume-title":"10th international workshop on worst-case execution time analysis (WCET 2010)","author":"Gustavsson"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2006.35"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/s11241-014-9213-9"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD63220.2024.00092"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-90900-9_11"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/321738.321743"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2015.2500572"}],"event":{"name":"2025 IEEE International Conference on Systems, Man, and Cybernetics (SMC)","location":"Vienna, Austria","start":{"date-parts":[[2025,10,5]]},"end":{"date-parts":[[2025,10,8]]}},"container-title":["2025 IEEE International Conference on Systems, Man, and Cybernetics (SMC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11342430\/11342431\/11342557.pdf?arnumber=11342557","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,2,11]],"date-time":"2026-02-11T20:53:17Z","timestamp":1770843197000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11342557\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,10,5]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/smc58881.2025.11342557","relation":{},"subject":[],"published":{"date-parts":[[2025,10,5]]}}}