{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T03:02:25Z","timestamp":1725591745398},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,10]]},"DOI":"10.1109\/socc.2009.5335688","type":"proceedings-article","created":{"date-parts":[[2009,11,20]],"date-time":"2009-11-20T13:33:15Z","timestamp":1258723995000},"page":"001-004","source":"Crossref","is-referenced-by-count":2,"title":["Simultaneous PVT-tolerant voltage-island formation and core placement for thousand-core platforms"],"prefix":"10.1109","author":[{"given":"Sohaib","family":"Majzoub","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Resve","family":"Saleh","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Steven J.E.","family":"Wilton","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rabab","family":"Ward","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"15","doi-asserted-by":"publisher","DOI":"10.1002\/jos.116"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/DDECS.2008.4538804"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2008.4492731"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.876103"},{"journal-title":"Variation-aware task allocation and scheduling for MPSoC","year":"2007","author":"wang","key":"11"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2007.364540"},{"year":"0","key":"3"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2009.4810397"},{"journal-title":"Thousand core chips A technology perspective","year":"2007","author":"borkar","key":"1"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391660"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2007.913186"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2007.66"},{"year":"0","key":"5"},{"key":"4","doi-asserted-by":"crossref","first-page":"128","DOI":"10.1145\/1278480.1278512","article-title":"energy-aware synthesis of networks-on-chip implemented with voltage islands","author":"lap-fai leung","year":"2007","journal-title":"2007 44th ACM\/IEEE Design Automation Conference DAC"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391550"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2007.364539"}],"event":{"name":"2009 International Symposium on System-on-Chip - SOC","start":{"date-parts":[[2009,10,5]]},"location":"Tampere, Finland","end":{"date-parts":[[2009,10,7]]}},"container-title":["2009 International Symposium on System-on-Chip"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5314285\/5335650\/05335688.pdf?arnumber=5335688","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,18]],"date-time":"2017-06-18T21:59:12Z","timestamp":1497823152000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5335688\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,10]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/socc.2009.5335688","relation":{},"subject":[],"published":{"date-parts":[[2009,10]]}}}