{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T05:02:04Z","timestamp":1729659724226,"version":"3.28.0"},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,9]]},"DOI":"10.1109\/socc.2010.5784641","type":"proceedings-article","created":{"date-parts":[[2011,6,10]],"date-time":"2011-06-10T15:57:50Z","timestamp":1307721470000},"page":"84-87","source":"Crossref","is-referenced-by-count":0,"title":["A 1.7Gbps DLL-based Clock Data Recovery in 0.35µm CMOS"],"prefix":"10.1109","author":[{"given":"Sang-Ho","family":"Kim","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hyung-Min","family":"Park","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tae-Ho","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jin-Ku","family":"Kang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jin-Ho","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jae-Youl","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yoon-Kyung","family":"Choi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Myunghee","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.848142"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"711","DOI":"10.1109\/JSSC.2002.1004575","article-title":"A 900-Mb\/s CMOS Data Recovery DLL Using Half-Frequency Clock","volume":"37","author":"xavier","year":"2002","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2008.4637639"},{"key":"ref5","first-page":"613","article-title":"CMOS Circuit Design, Layout, and Simulation","author":"baker","year":"2005","journal-title":"Wiley-Interscience"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"1556","DOI":"10.1889\/1.1821374","article-title":"A Third Generation Timing Controller And Colum Driver Architecture using Point-to-Point differential Signaling","volume":"35","author":"mccartney","year":"2004","journal-title":"Symp Dig SID"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2008.2002561"},{"key":"ref1","first-page":"192","article-title":"A 2.0Gb\/s Clock-Embedded Interface for Full-HD 10bit 120Hz LCD Drivers with 1\/5-Rate Noise-Tolerant Phase and Frequency Recovery","author":"koichi","year":"2009","journal-title":"IEEE Int Solid-State Circuits Conf Multi-Gb\/s Serial Links and Building Blocks"}],"event":{"name":"2010 IEEE International SOC Conference (SOCC)","start":{"date-parts":[[2010,9,27]]},"location":"Las Vegas, NV, USA","end":{"date-parts":[[2010,9,29]]}},"container-title":["23rd IEEE International SOC Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5755492\/5784634\/05784641.pdf?arnumber=5784641","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,20]],"date-time":"2017-06-20T01:25:08Z","timestamp":1497921908000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5784641\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,9]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/socc.2010.5784641","relation":{},"subject":[],"published":{"date-parts":[[2010,9]]}}}