{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T02:42:32Z","timestamp":1725417752550},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,9]]},"DOI":"10.1109\/socc.2010.5784749","type":"proceedings-article","created":{"date-parts":[[2011,6,10]],"date-time":"2011-06-10T11:57:50Z","timestamp":1307707070000},"page":"182-187","source":"Crossref","is-referenced-by-count":1,"title":["TERA: A FPGA-based trace-driven emulation framework for designing on-chip communication architectures"],"prefix":"10.1109","author":[{"given":"Dan","family":"Liu","sequence":"first","affiliation":[]},{"given":"Yi","family":"Feng","sequence":"additional","affiliation":[]},{"given":"Jingjin","family":"Zhou","sequence":"additional","affiliation":[]},{"given":"Dong","family":"Tong","sequence":"additional","affiliation":[]},{"given":"Xu","family":"Cheng","sequence":"additional","affiliation":[]},{"given":"Keyi","family":"Wang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.842912"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/1065579.1065669"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1331331.1331346"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/1176254.1176273"},{"key":"ref14","first-page":"1","author":"wolf","year":"2001","journal-title":"Computers as Components Principles of Embedded Computing System Design"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2004.839622"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2008.4483957"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/s10766-008-0081-6"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1016\/B978-0-12-373892-9.00001-3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.5"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2007.364669"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/43.924830"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MCAS.2007.910029"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/54.970421"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.873611"},{"key":"ref9","first-page":"194","author":"jerraya","year":"2005","journal-title":"Multiprocessor systems-on-chip"}],"event":{"name":"2010 IEEE International SOC Conference (SOCC)","start":{"date-parts":[[2010,9,27]]},"location":"Las Vegas, NV, USA","end":{"date-parts":[[2010,9,29]]}},"container-title":["23rd IEEE International SOC Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5755492\/5784634\/05784749.pdf?arnumber=5784749","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T07:06:01Z","timestamp":1490079961000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5784749\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,9]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/socc.2010.5784749","relation":{},"subject":[],"published":{"date-parts":[[2010,9]]}}}