{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,26]],"date-time":"2026-02-26T13:25:58Z","timestamp":1772112358999,"version":"3.50.1"},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,9]]},"DOI":"10.1109\/socc.2012.6398357","type":"proceedings-article","created":{"date-parts":[[2013,1,7]],"date-time":"2013-01-07T14:13:06Z","timestamp":1357567986000},"page":"254-259","source":"Crossref","is-referenced-by-count":4,"title":["Direction-constrained layer assignment for rectangle escape routing"],"prefix":"10.1109","author":[{"given":"Jin-Tai","family":"Yan","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhi-Wei","family":"Chen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"crossref","first-page":"2784","DOI":"10.1109\/TCAD.2006.882584","article-title":"A length-matching routing algorithm for high-performance printed circuit boards","author":"ozdal","year":"2006","journal-title":"IEEE Transactions on Computer-Aided Design"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2005.1560166"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2011.5722308"},{"key":"1","author":"coombs","year":"2007","journal-title":"Printed Circuits Handbook"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687444"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1630000"},{"key":"5","first-page":"390","article-title":"Optimal bus sequencing for escape routing in dense PCBs","author":"kong","year":"2007","journal-title":"International Conference on Computer-Aided Design"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2004.1382689"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837326"},{"key":"8","first-page":"205","article-title":"New optimal layer assignment for busoriented escape routing","author":"yan","year":"2011","journal-title":"ACM Great Lakes Symposium on VLSI"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1145\/800158.805069"},{"key":"12","year":"0"}],"event":{"name":"2012 IEEE 25th International SOC Conference (SOCC)","location":"Niagara Falls, NY, USA","start":{"date-parts":[[2012,9,12]]},"end":{"date-parts":[[2012,9,14]]}},"container-title":["2012 IEEE International SOC Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6387373\/6398324\/06398357.pdf?arnumber=6398357","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,21]],"date-time":"2017-06-21T01:18:16Z","timestamp":1498007896000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6398357\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,9]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/socc.2012.6398357","relation":{},"subject":[],"published":{"date-parts":[[2012,9]]}}}