{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T12:06:10Z","timestamp":1759147570740,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,9]]},"DOI":"10.1109\/socc.2012.6398377","type":"proceedings-article","created":{"date-parts":[[2013,1,7]],"date-time":"2013-01-07T19:13:06Z","timestamp":1357585986000},"page":"39-44","source":"Crossref","is-referenced-by-count":8,"title":["ADPLL variables determinations based on phase noise, spur and locking time"],"prefix":"10.1109","author":[{"given":"Bo","family":"Jiang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tian","family":"Xia","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"15","DOI":"10.1109\/LMWC.2007.892966"},{"key":"16","article-title":"Introduction to phase locked loop system modeling","author":"li","year":"2000","journal-title":"Analog Applications Journal"},{"doi-asserted-by":"publisher","key":"13","DOI":"10.1109\/CICC.2009.5280832"},{"year":"2011","journal-title":"2016-size TCXO with Low Phase Noise and Reduced Harmonics Developed","key":"14"},{"key":"11","first-page":"54","article-title":"A 5.3GHz digital-to-time-converter-based fractional-N alldigital PLL","author":"bergervoet","year":"2011","journal-title":"2011 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)"},{"doi-asserted-by":"publisher","key":"12","DOI":"10.1109\/CICC.2007.4405790"},{"doi-asserted-by":"publisher","key":"3","DOI":"10.1109\/TCSI.2002.802347"},{"doi-asserted-by":"publisher","key":"2","DOI":"10.1109\/JSSC.2009.2028753"},{"doi-asserted-by":"publisher","key":"1","DOI":"10.1109\/JSSC.2005.857417"},{"doi-asserted-by":"publisher","key":"10","DOI":"10.1109\/JSSC.2011.2162917"},{"doi-asserted-by":"publisher","key":"7","DOI":"10.1109\/TCSII.2006.889443"},{"doi-asserted-by":"publisher","key":"6","DOI":"10.1109\/NORCHP.2007.4481030"},{"doi-asserted-by":"publisher","key":"5","DOI":"10.1109\/RFIC.2004.1320575"},{"doi-asserted-by":"publisher","key":"4","DOI":"10.1109\/TCSI.2009.2039832"},{"key":"9","doi-asserted-by":"crossref","first-page":"784","DOI":"10.1109\/TCSII.2003.819119","article-title":"On the analysis of fractional-n frequency synthesizers for high-spectral purity","volume":"50","author":"de muer","year":"2003","journal-title":"IEEE Transactions on Circuits ana Systems - II Analog and Digital Signal Processing"},{"year":"2005","author":"limkumnerd","journal-title":"Mathematical Phase Noise Model for A Phase-locked Loop","key":"8"}],"event":{"name":"2012 IEEE 25th International SOC Conference (SOCC)","start":{"date-parts":[[2012,9,12]]},"location":"Niagara Falls, NY, USA","end":{"date-parts":[[2012,9,14]]}},"container-title":["2012 IEEE International SOC Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6387373\/6398324\/06398377.pdf?arnumber=6398377","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,7,8]],"date-time":"2019-07-08T02:11:19Z","timestamp":1562551879000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6398377\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,9]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/socc.2012.6398377","relation":{},"subject":[],"published":{"date-parts":[[2012,9]]}}}