{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T01:50:17Z","timestamp":1729648217053,"version":"3.28.0"},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,9]]},"DOI":"10.1109\/socc.2014.6948917","type":"proceedings-article","created":{"date-parts":[[2014,11,12]],"date-time":"2014-11-12T22:41:20Z","timestamp":1415832080000},"page":"152-155","source":"Crossref","is-referenced-by-count":4,"title":["Analysis of the current-voltage characteristics of Silicon on Ferroelectric Insulator Field Effect Transistor (SOF-FET)"],"prefix":"10.1109","author":[{"given":"Azzedin D","family":"Es-Sakhi","sequence":"first","affiliation":[]},{"given":"Masud H","family":"Chowdhury","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"13","doi-asserted-by":"publisher","DOI":"10.1063\/1.1484552"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1088\/0022-3727\/41\/9\/095408"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevLett.81.3014"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevLett.77.1628"},{"key":"3","article-title":"Device and circuit design challenges in the digital subthreshold region for ultra-low power applications","author":"ramesh","year":"2009","journal-title":"VLSI Design Journal"},{"key":"2","first-page":"73","article-title":"Design technologies for low power vlsi","volume":"36","author":"pedram","year":"1997","journal-title":"Encyclopedia of Computer Science and Technology"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2013.6674589"},{"key":"10","doi-asserted-by":"crossref","first-page":"405","DOI":"10.1021\/nl071804g","article-title":"Use of negative capacitance to provide voltage amplification for low power nanoscale devices","volume":"8","author":"salahuddin","year":"2008","journal-title":"Nano Letters"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008321919587"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2005413"},{"key":"5","first-page":"277","article-title":"Design and analysis of double-gate mosfets for ultra-low power radio frequency identification (rfid): Device and circuit co-design","author":"ramesh","year":"2011","journal-title":"Journal of Low Power Electronics and Applications"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2004.1332709"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/16.725254"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-9106-5"}],"event":{"name":"2014 27th IEEE International System-on-Chip Conference (SOCC)","start":{"date-parts":[[2014,9,2]]},"location":"Las Vegas, NV, USA","end":{"date-parts":[[2014,9,5]]}},"container-title":["2014 27th IEEE International System-on-Chip Conference (SOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6937053\/6948870\/06948917.pdf?arnumber=6948917","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,23]],"date-time":"2017-06-23T00:03:05Z","timestamp":1498176185000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6948917\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,9]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/socc.2014.6948917","relation":{},"subject":[],"published":{"date-parts":[[2014,9]]}}}