{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T21:02:44Z","timestamp":1725742964792},"reference-count":18,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,9]]},"DOI":"10.1109\/socc.2018.8618548","type":"proceedings-article","created":{"date-parts":[[2019,1,22]],"date-time":"2019-01-22T02:02:38Z","timestamp":1548122558000},"page":"322-325","source":"Crossref","is-referenced-by-count":4,"title":["10T Differential-Signal SRAM Design in a 14-nm FinFET Technology for High-Speed Application"],"prefix":"10.1109","author":[{"given":"Motoi","family":"Ichihashi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Youngtag","family":"Woo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Muhammed Ahosan","family":"Ul Karim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vivek","family":"Joshi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"David","family":"Burnett","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.891648"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2016.7905483"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2014.7046972"},{"key":"ref13","first-page":"308","article-title":"5.6Mb\/mm2 lRIW 8T SRAM Arrays Operating down to 560mV Utilizing Small-Signal Sensing with Charge-Shared Bitline and Asymmetric Sense Amplifier in 14nm FinFET CMOS Technology","author":"keane","year":"2016","journal-title":"ISSCC"},{"key":"ref14","first-page":"55","article-title":"Which is the best dual-port SRAM in 45-nm process technology? ?8T, 10T single end, and 10T differential-","author":"noguchi","year":"2008","journal-title":"ICICDT"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2016.7844166"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2004.1346590"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/VTSA.2005.1497065"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2007.2"},{"key":"ref4","first-page":"9.1.1","article-title":"A 16nm FinFET CMOS technology for mobile SoC and computing applications","author":"wu","year":"2013","journal-title":"IEDM"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870256"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIT.2017.7998202"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2016.7838333"},{"key":"ref8","first-page":"200","article-title":"A 5GHz 7nm L1 Cache Memory Compiler for High-Speed Computing and Mobile Applications","author":"clinton","year":"2018","journal-title":"ISSCC"},{"key":"ref7","first-page":"206","article-title":"A 7nm 256Mb SRAM in high-k metal-gate FinFET technology with write-assist circuitry for low- V Min applications","author":"chang","year":"2017","journal-title":"ISSCC"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2009.4977312"},{"key":"ref1","first-page":"56","article-title":"A 22nm IA multi-CPU and GPU System-on-Chip","author":"damaraju","year":"2012","journal-title":"ISSCC"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/.2005.1469239"}],"event":{"name":"2018 31st IEEE International System-on-Chip Conference (SOCC)","start":{"date-parts":[[2018,9,4]]},"location":"Arlington, VA","end":{"date-parts":[[2018,9,7]]}},"container-title":["2018 31st IEEE International System-on-Chip Conference (SOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8600278\/8618478\/08618548.pdf?arnumber=8618548","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T19:00:39Z","timestamp":1643223639000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8618548\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,9]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/socc.2018.8618548","relation":{},"subject":[],"published":{"date-parts":[[2018,9]]}}}