{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,2]],"date-time":"2025-08-02T19:01:59Z","timestamp":1754161319453,"version":"3.41.2"},"reference-count":22,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,9,1]],"date-time":"2019-09-01T00:00:00Z","timestamp":1567296000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,9,1]],"date-time":"2019-09-01T00:00:00Z","timestamp":1567296000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,9]]},"DOI":"10.1109\/socc46988.2019.1570547988","type":"proceedings-article","created":{"date-parts":[[2020,5,7]],"date-time":"2020-05-07T21:27:28Z","timestamp":1588886848000},"page":"74-79","source":"Crossref","is-referenced-by-count":1,"title":["A Glitch Key-Gate for Logic Locking"],"prefix":"10.1109","author":[{"given":"De-Xuan","family":"Ji","sequence":"first","affiliation":[{"name":"National Tsing Hua University,Department of Computer Science,Hsinchu,Taiwan,R.O.C.,30013"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hsiao-Yu","family":"Chiang","sequence":"additional","affiliation":[{"name":"National Tsing Hua University,Department of Computer Science,Hsinchu,Taiwan,R.O.C.,30013"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chia-Chun","family":"Lin","sequence":"additional","affiliation":[{"name":"National Tsing Hua University,Department of Computer Science,Hsinchu,Taiwan,R.O.C.,30013"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chia-Cheng","family":"Wu","sequence":"additional","affiliation":[{"name":"National Tsing Hua University,Department of Computer Science,Hsinchu,Taiwan,R.O.C.,30013"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yung-Chih","family":"Chen","sequence":"additional","affiliation":[{"name":"Yuan Ze University,Department of Computer Science and Engineering,Taoyuan,Taiwan,R.O.C.,32003"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chun-Yao","family":"Wang","sequence":"additional","affiliation":[{"name":"National Tsing Hua University,Department of Computer Science,Hsinchu,Taiwan,R.O.C.,30013"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2017.7951805"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2015.7140252"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062226"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-53140-2_7"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2016.7495588"},{"key":"ref15","article-title":"Security Analysis of Anti-SAT","author":"yasin","year":"2016","journal-title":"Asia and South Pacific Design Automation Conf"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2017.2740364"},{"key":"ref17","article-title":"A Practical Logic Obfuscation Technique for Hardware Security","author":"zhang","year":"2015","journal-title":"IEEE Trans on Very Large Scale Integration Systems"},{"journal-title":"Synopsys Design Compiler","year":"2018","key":"ref18"},{"journal-title":"Synopsys IC Compiler","year":"2018","key":"ref19"},{"key":"ref4","article-title":"Encrypt Flip-Flop: A Novel Logic Encryption Technique For Sequential Circuits","author":"karmaka","year":"2018","journal-title":"arXiv 1801 04961 [cs CR]"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691103"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2014.256"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2015.7059112"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2335155"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2013.193"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2437994"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2017.7918325"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2010.284"},{"journal-title":"Synopsys Primetime","year":"2018","key":"ref20"},{"journal-title":"IWLS Benchmarks","year":"2018","key":"ref22"},{"journal-title":"Synopsys Verdi","year":"2018","key":"ref21"}],"event":{"name":"2019 32nd IEEE International System-on-Chip Conference (SOCC)","start":{"date-parts":[[2019,9,3]]},"location":"Singapore","end":{"date-parts":[[2019,9,6]]}},"container-title":["2019 32nd IEEE International System-on-Chip Conference (SOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9083732\/9087941\/09088085.pdf?arnumber=9088085","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,28]],"date-time":"2025-07-28T19:44:35Z","timestamp":1753731875000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9088085\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,9]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/socc46988.2019.1570547988","relation":{},"subject":[],"published":{"date-parts":[[2019,9]]}}}