{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,11]],"date-time":"2025-09-11T20:23:19Z","timestamp":1757622199915,"version":"3.44.0"},"reference-count":22,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,9,1]],"date-time":"2019-09-01T00:00:00Z","timestamp":1567296000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,9,1]],"date-time":"2019-09-01T00:00:00Z","timestamp":1567296000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,9]]},"DOI":"10.1109\/socc46988.2019.1570548502","type":"proceedings-article","created":{"date-parts":[[2020,5,7]],"date-time":"2020-05-07T21:27:28Z","timestamp":1588886848000},"page":"230-235","source":"Crossref","is-referenced-by-count":2,"title":["Efficient Router Architecture for Trace Reduction During NoC Post-Silicon Validation"],"prefix":"10.1109","author":[{"given":"Sidhartha Sankar","family":"Rout","sequence":"first","affiliation":[{"name":"Indraprastha Institute of Information Technology Delhi,New Delhi,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Suyog Bhimrao","family":"Patil","sequence":"additional","affiliation":[{"name":"Indraprastha Institute of Information Technology Delhi,New Delhi,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vaibhav Ishwarlal","family":"Chaudhari","sequence":"additional","affiliation":[{"name":"Indraprastha Institute of Information Technology Delhi,New Delhi,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sujay","family":"Deb","sequence":"additional","affiliation":[{"name":"Indraprastha Institute of Information Technology Delhi,New Delhi,India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2007.364595"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2007.4437613"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2011.5783748"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2953878"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/2567936"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2019.00082"},{"key":"ref16","article-title":"Debug and trace for multicore socs","author":"orme","year":"2008","journal-title":"ARM White paper"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2007.55"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1995.524546"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2010.5416635"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837280"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2016.2643668"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2192457"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.2009158"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/LATW.2017.7906761"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105391"},{"key":"ref2","first-page":"23:1","article-title":"On-chip communication architecture exploration: A quantitative evaluation of point-to-point, bus, and network-on-chip approaches","volume":"12","author":"lee","year":"2008","journal-title":"ACM Trans Des Autom Electron Syst"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/2.976921"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2189395"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2018.8357293"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1007\/978-981-13-5950-7_19"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2016.7479205"}],"event":{"name":"2019 32nd IEEE International System-on-Chip Conference (SOCC)","start":{"date-parts":[[2019,9,3]]},"location":"Singapore","end":{"date-parts":[[2019,9,6]]}},"container-title":["2019 32nd IEEE International System-on-Chip Conference (SOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9083732\/9087941\/09088066.pdf?arnumber=9088066","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,9,8]],"date-time":"2025-09-08T17:40:41Z","timestamp":1757353241000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9088066\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,9]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/socc46988.2019.1570548502","relation":{},"subject":[],"published":{"date-parts":[[2019,9]]}}}