{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,11]],"date-time":"2025-09-11T20:21:05Z","timestamp":1757622065277,"version":"3.44.0"},"reference-count":13,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,9,1]],"date-time":"2019-09-01T00:00:00Z","timestamp":1567296000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,9,1]],"date-time":"2019-09-01T00:00:00Z","timestamp":1567296000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,9]]},"DOI":"10.1109\/socc46988.2019.1570553082","type":"proceedings-article","created":{"date-parts":[[2020,5,7]],"date-time":"2020-05-07T21:27:28Z","timestamp":1588886848000},"page":"354-358","source":"Crossref","is-referenced-by-count":6,"title":["Enabling Neuromorphic Computing: BEOL Integration of CMOS RRAM Chip and Programmable Performance"],"prefix":"10.1109","author":[{"given":"Weijie","family":"Wang","sequence":"first","affiliation":[{"name":"Institute of Microelectronics,Agency for Science, Technology and Research (A*STAR),Singapore,Singapore,138634"}]},{"given":"Victor Yi-Qqian","family":"Zhuo","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics,Agency for Science, Technology and Research (A*STAR),Singapore,Singapore,138634"}]},{"given":"Zhixian","family":"Chen","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics,Agency for Science, Technology and Research (A*STAR),Singapore,Singapore,138634"}]},{"given":"Hock Koon","family":"Lee","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics,Agency for Science, Technology and Research (A*STAR),Singapore,Singapore,138634"}]},{"given":"Minghua","family":"Li","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics,Agency for Science, Technology and Research (A*STAR),Singapore,Singapore,138634"}]},{"given":"Wendong","family":"Song","sequence":"additional","affiliation":[{"name":"Institute of Microelectronics,Agency for Science, Technology and Research (A*STAR),Singapore,Singapore,138634"}]}],"member":"263","reference":[{"key":"ref10","article-title":"NeuroSim+: An integrated device-to-algorithm framework for bendchmarking synaptic devices and array architechtures","author":"lee","year":"0","journal-title":"2017 IEEE International Electron Devices Meeting (IEDM 2017)"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-TSA.2016.7480502"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1038\/nn1859"},{"key":"ref13","doi-asserted-by":"crossref","DOI":"10.1038\/s41598-018-25376-x","article-title":"Evidence of soft bound behaviour in analogue memristive devices for neuromorphic computing","author":"frascaroli","year":"2018","journal-title":"Scientific Reports"},{"key":"ref4","article-title":"Stochastic memristive synapses from spintransfer torque magnetict tunnel junctions","author":"vincent","year":"0","journal-title":"2015 IEEE Magnetics Conference (INTERMAG) INTERMAG"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2011.6131488"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001140"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2016.7838429"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1063\/1.4955044"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"1951","DOI":"10.1109\/JPROC.2012.2190369","article-title":"Metal–Oxide RRAM","author":"philip wong","year":"2012","journal-title":"Proc IEEE 100"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2014.7047135"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2018.2871057"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2018.8618553"}],"event":{"name":"2019 32nd IEEE International System-on-Chip Conference (SOCC)","start":{"date-parts":[[2019,9,3]]},"location":"Singapore","end":{"date-parts":[[2019,9,6]]}},"container-title":["2019 32nd IEEE International System-on-Chip Conference (SOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9083732\/9087941\/09088053.pdf?arnumber=9088053","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,9,8]],"date-time":"2025-09-08T17:40:42Z","timestamp":1757353242000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9088053\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,9]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/socc46988.2019.1570553082","relation":{},"subject":[],"published":{"date-parts":[[2019,9]]}}}