{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,10]],"date-time":"2025-04-10T10:34:09Z","timestamp":1744281249603,"version":"3.37.3"},"reference-count":39,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,9,8]],"date-time":"2020-09-08T00:00:00Z","timestamp":1599523200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,9,8]],"date-time":"2020-09-08T00:00:00Z","timestamp":1599523200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"NSFC","doi-asserted-by":"publisher","award":["61972154,61772092"],"award-info":[{"award-number":["61972154,61772092"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,9,8]]},"DOI":"10.1109\/socc49529.2020.9524792","type":"proceedings-article","created":{"date-parts":[[2021,9,6]],"date-time":"2021-09-06T21:38:32Z","timestamp":1630964312000},"page":"31-36","source":"Crossref","is-referenced-by-count":2,"title":["Architectural Exploration on Racetrack Memories"],"prefix":"10.1109","author":[{"given":"Rui","family":"Xu","sequence":"first","affiliation":[{"name":"East China Normal University,School of Computer Science and Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Edwin Hsing.-Mean","family":"Sha","sequence":"additional","affiliation":[{"name":"East China Normal University,School of Computer Science and Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Qingfeng","family":"Zhuge","sequence":"additional","affiliation":[{"name":"East China Normal University,School of Computer Science and Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Liang","family":"Shi","sequence":"additional","affiliation":[{"name":"East China Normal University,School of Computer Science and Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shouzhen","family":"Gu","sequence":"additional","affiliation":[{"name":"East China Normal University,Software Engineering Institute"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333707"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744800"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2866932"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2015.1121"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/3299874.3318015"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2019.2899306"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2016.2547903"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744883"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/3372489"},{"key":"ref34","first-page":"100","article-title":"Quantitative modeling of racetrack memory, a tradeoff among area, performance, and power","author":"zhang","year":"0","journal-title":"Asia and South Pacific Design Automation Conference"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3012863"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.2986127"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC47756.2020.9045595"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.2986127"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317757"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1126\/science.1166767"},{"key":"ref16","doi-asserted-by":"crossref","DOI":"10.1038\/srep06784","article-title":"A strategy for the design of skyrmion racetrack memories","volume":"4","author":"tomasello","year":"2014","journal-title":"Scientific Reports"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1038\/srep07643"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/3333336"},{"key":"ref19","first-page":"49","article-title":"Switching properties in spin transper torque MRAM with sub-50nm MTJ size","author":"nam","year":"0","journal-title":"Proc IEEE 7th Non-Volatile Memory Technol Symp"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevB.85.174416"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1126\/science.1154587"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2013.210"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1126\/science.1145799"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/978-981-10-2720-8"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317937"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/3372489"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/SmartIoT.2019.00082"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2020.2975719"},{"key":"ref2","article-title":"Shiftable magnetic shift register and method of using the same","author":"parkin","year":"2004","journal-title":"Patent"},{"key":"ref9","article-title":"Optimization of Multi-port Domain Wall Memory","volume":"31","author":"xu","year":"2020","journal-title":"Xue Bao\/Journal of Software"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3297280.3297305"},{"key":"ref20","first-page":"417","article-title":"Multilane Racetrack Caches: Improving Efficiency Through Compression and Independent Shifting","author":"xu","year":"2015","journal-title":"ASP-DAC"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1038\/ncomms9541"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.365"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2015.218"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218642"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2016.2591578"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1126\/science.aaa1442"}],"event":{"name":"2020 IEEE 33rd International System-on-Chip Conference (SOCC)","start":{"date-parts":[[2020,9,8]]},"location":"Las Vegas, NV, USA","end":{"date-parts":[[2020,9,11]]}},"container-title":["2020 IEEE 33rd International System-on-Chip Conference (SOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9524739\/9524720\/09524792.pdf?arnumber=9524792","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,8]],"date-time":"2023-01-08T18:47:51Z","timestamp":1673203671000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9524792\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,9,8]]},"references-count":39,"URL":"https:\/\/doi.org\/10.1109\/socc49529.2020.9524792","relation":{},"subject":[],"published":{"date-parts":[[2020,9,8]]}}}