{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T06:25:39Z","timestamp":1763447139268,"version":"3.45.0"},"reference-count":23,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T00:00:00Z","timestamp":1759104000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T00:00:00Z","timestamp":1759104000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001659","name":"Deutsche Forschungsgemeinschaft","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100001659","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,9,29]]},"DOI":"10.1109\/socc66126.2025.11235386","type":"proceedings-article","created":{"date-parts":[[2025,11,17]],"date-time":"2025-11-17T18:39:03Z","timestamp":1763404743000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["Exploring RISC-V Instruction-Level Optimization Through Macro-Operation Fusion for TensorFlow-based Models"],"prefix":"10.1109","author":[{"given":"Ahmad","family":"Othman","sequence":"first","affiliation":[{"name":"Technische Universit&#x00E4;t Dresden,Chair of Adaptive Dynamic Systems,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Nico","family":"R\u00f6der","sequence":"additional","affiliation":[{"name":"Technische Universit&#x00E4;t Dresden,Chair of Adaptive Dynamic Systems,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ahmed","family":"Kamaleldin","sequence":"additional","affiliation":[{"name":"Technische Universit&#x00E4;t Dresden,Chair of Adaptive Dynamic Systems,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Diana","family":"G\u00f6hringer","sequence":"additional","affiliation":[{"name":"Technische Universit&#x00E4;t Dresden,Chair of Adaptive Dynamic Systems,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/MICRO56248.2022.00026"},{"year":"2025","article-title":"Intel\u00ae 64 and IA-32 Architectures Software Developer\u2019s Manual","key":"ref2"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/PATMOS.2019.8862170"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1117\/12.2642009"},{"year":"2023","author":"Zeh","article-title":"RISC-V Cryptographic Extension Proposals","key":"ref5"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.46586\/tches.v2023.i1.193-237"},{"volume-title":"Proc. 1st Workshop on Computer Architecture Research with RISC-V (CARRV)","author":"Clark","article-title":"RV8: A High Performance RISC-V to x86 Binary Translator","key":"ref7"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/CGO.2004.1281676"},{"key":"ref9","article-title":"The Renewed Case for The Reduced Instruction Set Computer: Avoiding ISA bloat with Macro-op Fusion for RISC-V","volume-title":"EECS Dept., Univ. of California, Berkeley, Tech. Rep. UCB\/EECS-2016-130","author":"Celio","year":"2016"},{"year":"2006","article-title":"SPEC CPU2006: Integer Component (CINT2006)","key":"ref10"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1145\/3677333.3678150"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1155\/2023\/8031859"},{"year":"2021","article-title":"Skylake (Client) - Microarchitectures - Intel - WikiChip","key":"ref13"},{"key":"ref14","first-page":"265","article-title":"TensorFlow: A System for Large-Scale Machine Learning","volume-title":"Proceedings of the 12th USENIX conference on Operating Systems Design and Implementation (OSDI\u201916)","author":"Abadi"},{"volume-title":"TensorFlow Lite Micro \u2014 TensorFlow Lite for Microcontrollers","year":"2025","key":"ref16"},{"volume-title":"QEMU, a fast and portable dynamic translator","key":"ref17"},{"article-title":"Open Neural Network Exchange (ONNX)","key":"ref18"},{"article-title":"TensorFlow backend for ONNX","key":"ref19"},{"doi-asserted-by":"publisher","key":"ref20","DOI":"10.1145\/3422667"},{"volume-title":"RISC-V Vector Extension Specification","year":"2024","key":"ref21"},{"volume-title":"RiVEC Benchmark Suite","key":"ref22"},{"author":"Magic","article-title":"SparseZoo: A model repository for sparse inference","key":"ref23"},{"volume-title":"Hugging Face","year":"2022","article-title":"gpt2 (Revision 909a290)","key":"ref24"}],"event":{"name":"2025 IEEE 38th International System-on-Chip Conference (SOCC)","start":{"date-parts":[[2025,9,29]]},"location":"Dubai, United Arab Emirates","end":{"date-parts":[[2025,10,1]]}},"container-title":["2025 IEEE 38th International System-on-Chip Conference (SOCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11235309\/11235311\/11235386.pdf?arnumber=11235386","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T06:21:09Z","timestamp":1763446869000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11235386\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,9,29]]},"references-count":23,"URL":"https:\/\/doi.org\/10.1109\/socc66126.2025.11235386","relation":{},"subject":[],"published":{"date-parts":[[2025,9,29]]}}}