{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,8]],"date-time":"2025-09-08T06:44:52Z","timestamp":1757313892742,"version":"3.28.0"},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,3]]},"DOI":"10.1109\/ssd.2015.7348110","type":"proceedings-article","created":{"date-parts":[[2015,12,8]],"date-time":"2015-12-08T17:14:24Z","timestamp":1449594864000},"page":"1-5","source":"Crossref","is-referenced-by-count":7,"title":["SHA-2 hardware core for virtex-5 FPGA"],"prefix":"10.1109","author":[{"given":"Anane","family":"Mohamed","sequence":"first","affiliation":[]},{"given":"Anane","family":"Nadjia","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","article-title":"A brief implementation analysis of SHA ?1 on FPGAs”, GPU s and Cell Processors","author":"zhou","year":"0","journal-title":"2009 International Conference on Engineering Computation"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/HICSS.2005.291"},{"key":"ref10","first-page":"180","article-title":"NIST","year":"2002","journal-title":"Secure Hash Standard FIPS PUB"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/ReConFig.2011.16"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/DSD.2011.75"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/ISVLSI.2006.70"},{"key":"ref12","article-title":"Hardware implementation of a multi-mode hash architecture for MD5, SHA-l and SHA-2","author":"ducloyer","year":"2007","journal-title":"Proceedings of the Design and Architectures for Signal and Image Processing 2007 Workshop"},{"key":"ref8","first-page":"130","article-title":"High-Speed and Low-Power Implementation of Hash Message Authentication Code through Partially Unrolled Techniques","author":"michail","year":"0","journal-title":"Proc 5th WSEAS Intl Conf on Multimedia Internet and Video Technologies"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"70","DOI":"10.1049\/iet-cdt.2013.0010","article-title":"Optimising the SHA-512 cryptographic hash function on FPGAs","volume":"8","author":"athanasiou","year":"2014","journal-title":"IET Comput Digit Tech"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/TAES.2013.6558003"},{"key":"ref9","first-page":"407","article-title":"Constructing Secure Hash Functions by Enhancing Merkle-Damgard Construction","author":"gauravaraml","year":"2006","journal-title":"ACISP'2006 LNCS 4058"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/ICED.2008.4786681"}],"event":{"name":"2015 12th International Multi-Conference on Systems, Signals & Devices (SSD)","start":{"date-parts":[[2015,3,16]]},"location":"Mahdia, Tunisia","end":{"date-parts":[[2015,3,19]]}},"container-title":["2015 IEEE 12th International Multi-Conference on Systems, Signals & Devices (SSD15)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7336450\/7348090\/07348110.pdf?arnumber=7348110","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,28]],"date-time":"2022-05-28T11:14:07Z","timestamp":1653736447000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7348110\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,3]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/ssd.2015.7348110","relation":{},"subject":[],"published":{"date-parts":[[2015,3]]}}}