{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,19]],"date-time":"2025-03-19T15:51:58Z","timestamp":1742399518636},"reference-count":25,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2013,10,1]],"date-time":"2013-10-01T00:00:00Z","timestamp":1380585600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Biomed. Circuits Syst."],"published-print":{"date-parts":[[2013,10]]},"DOI":"10.1109\/tbcas.2012.2232925","type":"journal-article","created":{"date-parts":[[2013,3,8]],"date-time":"2013-03-08T19:43:22Z","timestamp":1362771802000},"page":"722-731","source":"Crossref","is-referenced-by-count":4,"title":["A 1.5 ns OFF\/ON Switching-Time Voltage-Mode LVDS Driver\/Receiver Pair for Asynchronous AER Bit-Serial Chip Grid Links With Up to 40 Times Event-Rate Dependent Power Savings"],"prefix":"10.1109","volume":"7","author":[{"given":"Carlos","family":"Zamarreno-Ramos","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Raghavendra","family":"Kulkarni","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jose","family":"Silva-Martinez","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Teresa","family":"Serrano-Gotarredona","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Bernabe","family":"Linares-Barranco","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2004.830703"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2006.887474"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.2008.4634199"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2009.2036912"},{"key":"ref14","article-title":"Multi-casting mesh AER: A scalable assembly approach for reconfigurable neuromorphic structured AER systems. Application to ConvNets","author":"zamarre\ufffdo-ramos","year":"2012","journal-title":"IEEE Trans Biomed Circuits Syst"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2151070"},{"key":"ref16","doi-asserted-by":"crossref","first-page":"706","DOI":"10.1109\/4.913751","article-title":"LVDS I\/O interface for Gp\/s-per-pin operation in 0.35 <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\mu$<\/tex> <\/formula>m CMOS","volume":"36","author":"boni","year":"2001","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.840955"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2012.2186136"},{"key":"ref19","first-page":"2433","article-title":"Voltage mode driver for low power transmission of high speed serial AER Links","author":"zamarre\ufffdo-ramos","year":"2011","journal-title":"Proc IEEE Int Symp Circuits and Systems"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2009.2023653"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1162\/neco.2007.19.9.2281"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2011.2163155"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.3390\/s90705076"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/4.387069"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2012.2184285"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2003.822551"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/82.842110"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008309524326"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.908692"},{"key":"ref22","doi-asserted-by":"crossref","first-page":"1635","DOI":"10.1109\/TCSI.2008.2008279","article-title":"Design of an all-digital LVDS driver","volume":"56","author":"lu","year":"2009","journal-title":"IEEE Trans Circuits Syst I Reg Papers"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.825259"},{"key":"ref24","article-title":"An 8 Gb\/s transceiver with 3x-oversampling 2-threshold eye-tracking CDR circuit for <formula formulatype=\"inline\"><tex Notation=\"TeX\">${-}36.8$<\/tex><\/formula> dB-loss backplane","author":"fukuda","year":"2008","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2006230"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2006.1693319"}],"container-title":["IEEE Transactions on Biomedical Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4156126\/6646269\/06471789.pdf?arnumber=6471789","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:55:18Z","timestamp":1642006518000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6471789\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,10]]},"references-count":25,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tbcas.2012.2232925","relation":{},"ISSN":["1932-4545","1940-9990"],"issn-type":[{"value":"1932-4545","type":"print"},{"value":"1940-9990","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,10]]}}}