{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,5]],"date-time":"2025-11-05T06:28:44Z","timestamp":1762324124001},"reference-count":36,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2017,10,1]],"date-time":"2017-10-01T00:00:00Z","timestamp":1506816000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/OAPA.html"}],"funder":[{"name":"European Research Council"},{"name":"European Unions Seventh Framework Programme","award":["FP\/2007-2013"],"award-info":[{"award-number":["FP\/2007-2013"]}]},{"name":"ERC","award":["320689"],"award-info":[{"award-number":["320689"]}]},{"DOI":"10.13039\/501100000266","name":"U.K. Engineering and Physical Sciences Research Council","doi-asserted-by":"crossref","award":["EP\/G015740\/1"],"award-info":[{"award-number":["EP\/G015740\/1"]}],"id":[{"id":"10.13039\/501100000266","id-type":"DOI","asserted-by":"crossref"}]},{"name":"EU FP7","award":["604102"],"award-info":[{"award-number":["604102"]}]},{"name":"The Human Brain Project","award":["EU H2020","644096"],"award-info":[{"award-number":["EU H2020","644096"]}]},{"name":"ECOMODE","award":["687299"],"award-info":[{"award-number":["687299"]}]},{"name":"NEURAM3"},{"name":"Polish grant from the Ministry of Science and Higher Education AGHUST","award":["11.11.120.612"],"award-info":[{"award-number":["11.11.120.612"]}]},{"name":"Spanish grants from the Ministry of Economy and Competitivity","award":["TEC2012-37868-C04-01\/02"],"award-info":[{"award-number":["TEC2012-37868-C04-01\/02"]}]},{"name":"BIOSENSE","award":["TEC2015-63884-C2-1-P"],"award-info":[{"award-number":["TEC2015-63884-C2-1-P"]}]},{"name":"COGNET","award":["TEC2016-77785-P"],"award-info":[{"award-number":["TEC2016-77785-P"]}]},{"DOI":"10.13039\/501100008530","name":"European Regional Development Fund","doi-asserted-by":"crossref","id":[{"id":"10.13039\/501100008530","id-type":"DOI","asserted-by":"crossref"}]},{"name":"Andalusian","award":["TIC-6091"],"award-info":[{"award-number":["TIC-6091"]}]},{"name":"NANO-NEURO","award":["P12-TIC-1300"],"award-info":[{"award-number":["P12-TIC-1300"]}]},{"name":"MINERVA"},{"name":"Spanish FPI Scholarship from the Ministry of Economy and Competitivity"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Biomed. Circuits Syst."],"published-print":{"date-parts":[[2017,10]]},"DOI":"10.1109\/tbcas.2017.2717341","type":"journal-article","created":{"date-parts":[[2017,8,14]],"date-time":"2017-08-14T18:08:33Z","timestamp":1502734113000},"page":"1133-1147","source":"Crossref","is-referenced-by-count":31,"title":["On Multiple AER Handshaking Channels Over High-Speed Bit-Serial Bidirectional LVDS Links With Flow-Control and Clock-Correction on Commercial FPGAs for Scalable Neuromorphic Systems"],"prefix":"10.1109","volume":"11","author":[{"given":"Amirreza","family":"Yousefzadeh","sequence":"first","affiliation":[]},{"given":"Miroslaw","family":"Jablonski","sequence":"additional","affiliation":[]},{"given":"Taras","family":"Iakymchuk","sequence":"additional","affiliation":[]},{"given":"Alejandro","family":"Linares-Barranco","sequence":"additional","affiliation":[]},{"given":"Alfredo","family":"Rosado","sequence":"additional","affiliation":[]},{"given":"Luis A.","family":"Plana","sequence":"additional","affiliation":[]},{"given":"Steve","family":"Temple","sequence":"additional","affiliation":[]},{"given":"Teresa","family":"Serrano-Gotarredona","sequence":"additional","affiliation":[]},{"given":"Steve B.","family":"Furber","sequence":"additional","affiliation":[]},{"given":"Bernabe","family":"Linares-Barranco","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2003.1199169"},{"key":"ref32","article-title":"Zero latency synchronizers using four and two phase protocols","author":"dobkin","year":"2007"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/EBCCSP.2015.7300697"},{"key":"ref30","article-title":"Byte oriented DC balanced (0,4) 8b\/10b partitioned block transmission code","author":"franaszek","year":"1984"},{"key":"ref36","article-title":"jAER Open Source Project","author":"delbruck","year":"2007"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2085952"},{"key":"ref34","year":"2010","journal-title":"Spartan-6 FPGA GTP Transceiver Advanced Product Specifications UG386 (v2 2)"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2009.2023653"},{"key":"ref11","first-page":"2849","article-title":"SpiNNaker: Mapping neural networks onto a\n massively-parallel chip multi-processor","author":"kahn","year":"0","journal-title":"Proc IEEE Int Joint Conf Neural Netw"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN.2008.4633916"},{"key":"ref13","first-page":"893","article-title":"Bit-serial address-event representation","author":"pouliquen","year":"1999","journal-title":"Proc 33rd Annu Conf Inform Sci Syst"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2004.830703"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2304638"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2007.149"},{"key":"ref17","year":"2008","journal-title":"LVDS owner's manual"},{"key":"ref18","first-page":"938","article-title":"A LVDS serial AER link","year":"0","journal-title":"Proc 13th IEEE Int Conf Circuits Syst"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2007.378041"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2230553"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2007.916031"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2012.142"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/82.842110"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2009.2027127"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/BIPOL.1995.493877"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2008.924448"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2011.2163155"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2008.2005781"},{"key":"ref2","article-title":"VLSI analogs of neuronal visual processing: A synthesis of form\n and function","author":"mahowald","year":"1992"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2010.2075929"},{"key":"ref1","article-title":"Wiring considerations in analog VLSI systems with application to\n field-programmable networks","author":"sivilotti","year":"1991"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2008.4541501"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2012.2186136"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2012.2195725"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2151070"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2012.2232925"},{"key":"ref26","article-title":"spI\/O: A library of FPGA designs and reusable\n modules for I\/O in SpiNNaker systems","author":"plana","year":"2014"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2014.6865445"}],"container-title":["IEEE Transactions on Biomedical Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/4156126\/8049546\/08010303.pdf?arnumber=8010303","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,11]],"date-time":"2021-10-11T03:00:05Z","timestamp":1633921205000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8010303\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,10]]},"references-count":36,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tbcas.2017.2717341","relation":{},"ISSN":["1932-4545","1940-9990"],"issn-type":[{"value":"1932-4545","type":"print"},{"value":"1940-9990","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,10]]}}}