{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,11]],"date-time":"2025-07-11T00:01:04Z","timestamp":1752192064643,"version":"3.41.2"},"reference-count":23,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[1976,12,1]],"date-time":"1976-12-01T00:00:00Z","timestamp":218246400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[1976,12,1]],"date-time":"1976-12-01T00:00:00Z","timestamp":218246400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[1976,12,1]],"date-time":"1976-12-01T00:00:00Z","timestamp":218246400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput."],"published-print":{"date-parts":[[1976,12]]},"DOI":"10.1109\/tc.1976.1674591","type":"journal-article","created":{"date-parts":[[2007,9,4]],"date-time":"2007-09-04T16:35:10Z","timestamp":1188923710000},"page":"1242-1253","source":"Crossref","is-referenced-by-count":24,"title":["Modeling and Digital Simulation for Design Verification and Diagnosis"],"prefix":"10.1109","volume":"C-25","author":[{"family":"Szygenda","sequence":"first","affiliation":[{"name":"Department of Electrical Engineering, University of Texas"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Thompson","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TEC.1962.5219384"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/PGEC.1965.264063"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1962.tb03275.x"},{"journal-title":"Design and use of fault simulation for Saturn computer design","year":"1966","author":"hardie","key":"ref13"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/800186.810587"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1969.tb01159.x"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1972.223542"},{"key":"ref17","article-title":"fault insertion techniques and models for digital logic simulation","volume":"41","author":"thompson","year":"1972","journal-title":"1972 Fall Joint Comput Conf AFIPS Conf Proc"},{"key":"ref18","article-title":"timing analysis for digital fault simulation using assignable delays","author":"thompson","year":"1974","journal-title":"Proc 11th Design Automation Workshop"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1974.tb02799.x"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1969.222520"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1147\/rd.92.0090"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1969.222783"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1147\/sj.83.0178"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1479064.1479176"},{"key":"ref7","article-title":"a model and implementation of a universal time delay simulator for large digital nets","volume":"36","author":"szygenda","year":"1970","journal-title":"1970 Spring Joint Comput Conf AFIPS Conf Proc"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/321203.321214"},{"journal-title":"Digital System Design Automation Languages Simulation & Data Bases","year":"1975","author":"breuer","key":"ref1"},{"key":"ref9","first-page":"10","article-title":"a comparison of fault simulation methods for digital systems","author":"manning","year":"1967","journal-title":"Dig 1st Annu IEEE Comput Conf"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"1535","DOI":"10.1002\/j.1538-7305.1974.tb02803.x","article-title":"lamp: application to switching-system development","volume":"53","author":"butler","year":"1974","journal-title":"Bell Syst Tech J"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/C-M.1975.218898"},{"key":"ref21","article-title":"functional simulation in the lamp system","author":"chappell","year":"1976","journal-title":"Proc 13th Design Automation Conf"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1974.223820"}],"container-title":["IEEE Transactions on Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/12\/35145\/01674591.pdf?arnumber=1674591","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,9]],"date-time":"2025-07-09T23:08:11Z","timestamp":1752102491000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/1674591\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1976,12]]},"references-count":23,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tc.1976.1674591","relation":{},"ISSN":["0018-9340","1557-9956","2326-3814"],"issn-type":[{"type":"print","value":"0018-9340"},{"type":"electronic","value":"1557-9956"},{"type":"electronic","value":"2326-3814"}],"subject":[],"published":{"date-parts":[[1976,12]]}}}