{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,9,13]],"date-time":"2023-09-13T18:36:14Z","timestamp":1694630174292},"reference-count":104,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[1976,12,1]],"date-time":"1976-12-01T00:00:00Z","timestamp":218246400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput."],"published-print":{"date-parts":[[1976,12]]},"DOI":"10.1109\/tc.1976.1674597","type":"journal-article","created":{"date-parts":[[2007,9,4]],"date-time":"2007-09-04T20:35:10Z","timestamp":1188938110000},"page":"1289-1303","source":"Crossref","is-referenced-by-count":3,"title":["The Application of Transistor Technology to Computers"],"prefix":"10.1109","volume":"C-25","author":[{"family":"Henle","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Ho","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Johnson","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Pricer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Walsh","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/T-ED.1973.17676"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/FEDC.2008.4483883"},{"key":"ref33","doi-asserted-by":"crossref","first-page":"22","DOI":"10.1109\/IEDM.1968.187948","article-title":"insulated gate field effect transistor integrated circuits with silicon gates","author":"faggin","year":"1968","journal-title":"1968 International Electron Devices Meeting"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1016\/0038-1101(68)90067-1"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/T-ED.1968.16511"},{"key":"ref30","doi-asserted-by":"crossref","first-page":"102","DOI":"10.1109\/IEDM.1966.187724","article-title":"insulated gate field effect transistors fabricated using the gate as source-drain mask","author":"bower","year":"1966","journal-title":"1966 International Electron Devices Meeting"},{"key":"ref37","doi-asserted-by":"crossref","first-page":"502","DOI":"10.1063\/1.1653513","article-title":"the adjustment of mos transistor threshold voltage by ion implantation","volume":"18","author":"macpherson","year":"1971","journal-title":"Appl Phys Lett"},{"key":"ref36","first-page":"575","article-title":"the use of ion implantation to set the threshold voltage of mos transistors","author":"aubuchon","year":"1969","journal-title":"Proc Int Conf Properties and Use of MIS Structures"},{"key":"ref35","first-page":"225","article-title":"some problems of mos technology","volume":"31","author":"appels","year":"1970","journal-title":"Philips Tech Rev"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/MSPEC.1969.5214116"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1149\/1.2423929"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1147\/rd.84.0376"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1964.3436"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1965.1157612"},{"key":"ref22","first-page":"62","article-title":"using four-phase ic logic","volume":"15","author":"karp","year":"1967","journal-title":"Electron Des"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1966.1157700"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1967.1049821"},{"key":"ref23","first-page":"170","article-title":"mtos four-phase clock systems","volume":"9","author":"cohen","year":"1967","journal-title":"NEREM Rec"},{"key":"ref101","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1976.1155527"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1973.1050416"},{"key":"ref100","first-page":"208","article-title":"a 25 ns read-access bipolar 1k\/bit ttl ram","author":"magumi","year":"1974","journal-title":"ISSCC Digest Tech Papers"},{"key":"ref25","first-page":"152","author":"carr","year":"1972","journal-title":"MOS\/LSI Design and Applications"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1974.1050512"},{"key":"ref51","doi-asserted-by":"crossref","DOI":"10.7249\/R1956","author":"sutherland","year":"1976","journal-title":"Basic limitations in microcircuit fabrication technology"},{"key":"ref59","year":"1968","journal-title":"Field-effect transistor memory"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1972.1155050"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1965.1157606"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1971.8333"},{"key":"ref55","year":"1969","journal-title":"Error correctable and repairable data processing storage system"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1976.1155514"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1976.1155515"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1142\/9789814503464_0086"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1975.1050595"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRev.74.232"},{"key":"ref3","year":"0"},{"key":"ref6","article-title":"silicon-silicon dioxide field induced surface devices","author":"khang","year":"1960","journal-title":"IRE Solid-State Device Res Conf"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1959.tb03907.x"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1963.2488"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1049\/el:19700159"},{"key":"ref7","author":"ihantola","year":"1961","journal-title":"Design theory of a surface-field-effect transistor"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/T-ED.1964.15336"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1974.1050510"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1974.1050509"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1967.5817"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1966.4661"},{"key":"ref42","doi-asserted-by":"crossref","first-page":"110","DOI":"10.1109\/IEDM.1970.188299","article-title":"dsa enhancement&#8212;depletion mos ic","author":"tarui","year":"1970","journal-title":"1970 International Electron Devices Meeting"},{"key":"ref41","article-title":"a double-diffused mos transistor with microwave gain and subnanosecond switching speeds","author":"cauge","year":"1970","journal-title":"IEEE Int Electron Devices Meeting"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1975.1050617"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/T-ED.1972.17370"},{"key":"ref73","first-page":"29","article-title":"trw system sets gate-density record for bipolar logic","year":"1975","journal-title":"Electronics"},{"key":"ref72","year":"1971","journal-title":"Texas Instruments Series 545\/745"},{"key":"ref71","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1973.1050395"},{"key":"ref70","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1969.1049946"},{"key":"ref76","article-title":"bell labs develops schottky i2l logic to replace ttl arrays","year":"1975","journal-title":"Electronics"},{"key":"ref77","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1973.1050419"},{"key":"ref74","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1972.1052890"},{"key":"ref75","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1972.1052891"},{"key":"ref78","doi-asserted-by":"publisher","DOI":"10.1149\/1.2411820"},{"key":"ref79","first-page":"46","article-title":"scratchpads","year":"1965","journal-title":"Electronics"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1973.1050408"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1976.1155553"},{"key":"ref61","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1973.1050407"},{"key":"ref63","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1976.10272"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1109\/MSPEC.1967.5215754"},{"key":"ref65","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1975.9825"},{"key":"ref66","doi-asserted-by":"publisher","DOI":"10.1016\/0038-1101(72)90103-7"},{"key":"ref67","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1975.9906"},{"key":"ref68","author":"gibson","year":"1966","journal-title":"Integrated Circuits Handbook"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1063\/1.1659111"},{"key":"ref69","first-page":"81","author":"hibberd","year":"1969","journal-title":"Integrated Circuits (Texas Instruments Electronic Series)"},{"key":"ref1","first-page":"11","article-title":"progress in digital integrated electronics","author":"moore","year":"1975","journal-title":"1975 International Electron Devices Meeting"},{"key":"ref95","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1972.1050302"},{"key":"ref94","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1969.1154699"},{"key":"ref93","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1969.1154746"},{"key":"ref92","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1967.1154529"},{"key":"ref91","first-page":"315","article-title":"a high-speed scratchpad memory","volume":"29","author":"catt","year":"1966","journal-title":"1966 Fall Joint Computer Conf AFIPS Conf Proc"},{"key":"ref104","first-page":"53","article-title":"cray-1: the smaller supercomputer","year":"1976","journal-title":"Computer"},{"key":"ref90","first-page":"118","article-title":"integrated scratch pads sire a new generation of computers","volume":"39","author":"potter","year":"1966","journal-title":"Electronics"},{"key":"ref103","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1973.1050413"},{"key":"ref102","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1971.1050188"},{"key":"ref98","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1971.1050189"},{"key":"ref99","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1974.1155308"},{"key":"ref96","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1970.1154855"},{"key":"ref97","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1970.1050111"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1016\/0038-1101(64)90039-5"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1959.1157035"},{"key":"ref12","first-page":"84","article-title":"mos integrated circuits save space and money","volume":"38","author":"farina","year":"1965","journal-title":"Electronics"},{"key":"ref13","year":"1968","journal-title":"Integrated IGFET logic circuit with-linear resistive load"},{"key":"ref14","first-page":"124","article-title":"normally-on load device for igfet switching circuits","volume":"11","author":"lin","year":"1969","journal-title":"NEREM Rec"},{"key":"ref15","first-page":"86","article-title":"ion implantation offers a bagful of benefits for mos","volume":"43","author":"macdougall","year":"1970","journal-title":"Electronics"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1972.1050281"},{"key":"ref82","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1971.1050187"},{"key":"ref17","first-page":"12","year":"1971","journal-title":"Int l Solid State Circuits Conf Digest of Technical Papers"},{"key":"ref81","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1971.1050190"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1963.1157450"},{"key":"ref84","year":"1972","journal-title":"Two-device monolithic bipolar memory array"},{"key":"ref19","first-page":"627","article-title":"switching response of complementary-symmetry mos transistor logic circuits","volume":"25","author":"burns","year":"1964","journal-title":"RCA Rev"},{"key":"ref83","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1976.1155537"},{"key":"ref80","author":"agusta","year":"1965","journal-title":"A 16-bit monolithic memory array chip"},{"key":"ref89","first-page":"1053","article-title":"an integrated semiconductor memory system","volume":"27","author":"perkins","year":"1965","journal-title":"1965 Fall Joint Computer Conf AFIPS Conf Proc"},{"key":"ref85","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1971.223345"},{"key":"ref86","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1967.1154572"},{"key":"ref87","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1970.1154838"},{"key":"ref88","first-page":"164","author":"luecke","year":"1973","journal-title":"Semiconductor Memory Design and Applications"}],"container-title":["IEEE Transactions on Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/12\/35145\/01674597.pdf?arnumber=1674597","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:39:24Z","timestamp":1638218364000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1674597\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1976,12]]},"references-count":104,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tc.1976.1674597","relation":{},"ISSN":["0018-9340"],"issn-type":[{"value":"0018-9340","type":"print"}],"subject":[],"published":{"date-parts":[[1976,12]]}}}