{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,23]],"date-time":"2026-10-23T11:58:28Z","timestamp":1792756708093,"version":"4.5.0"},"reference-count":0,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[1985,10,1]],"date-time":"1985-10-01T00:00:00Z","timestamp":496972800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput."],"published-print":{"date-parts":[[1985,10]]},"DOI":"10.1109\/tc.1985.6312192","type":"journal-article","created":{"date-parts":[[2012,10,9]],"date-time":"2012-10-09T21:59:08Z","timestamp":1349819948000},"page":"892-901","source":"Crossref","is-referenced-by-count":928,"title":["Fat-trees: Universal networks for hardware-efficient supercomputing"],"prefix":"10.1109","volume":"C-34","author":[{"given":"Charles E.","family":"Leiserson","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","container-title":["IEEE Transactions on Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/12\/6312188\/06312192.pdf?arnumber=6312192","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:40:17Z","timestamp":1638218417000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6312192\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1985,10]]},"references-count":0,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tc.1985.6312192","relation":{},"ISSN":["0018-9340"],"issn-type":[{"value":"0018-9340","type":"print"}],"subject":[],"published":{"date-parts":[[1985,10]]}}}