{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,10]],"date-time":"2025-09-10T22:33:10Z","timestamp":1757543590564,"version":"3.41.2"},"reference-count":29,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[1987,7,1]],"date-time":"1987-07-01T00:00:00Z","timestamp":552096000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[1987,7,1]],"date-time":"1987-07-01T00:00:00Z","timestamp":552096000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[1987,7,1]],"date-time":"1987-07-01T00:00:00Z","timestamp":552096000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput."],"published-print":{"date-parts":[[1987,7]]},"DOI":"10.1109\/tc.1987.1676978","type":"journal-article","created":{"date-parts":[[2007,9,4]],"date-time":"2007-09-04T16:35:10Z","timestamp":1188923710000},"page":"810-822","source":"Crossref","is-referenced-by-count":50,"title":["On the Permutation Capability of Multistage Interconnection Networks"],"prefix":"10.1109","volume":"C-36","author":[{"family":"Szymanski","sequence":"first","affiliation":[{"name":"Departments of Electrical Engineering and Computer Science and the Computer Systems Research Institute, University of Toronto"}]},{"family":"Hamacher","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/800015.808171"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1953.tb01433.x"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/327070.327371"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1981.1675776"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1982.1675927"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/800123.803967"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1983.1676169"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/327070.327370"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1976.1674637"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1975.224157"},{"journal-title":"C-net A cost-effective multistage interconnection network","year":"1984","author":"shin","key":"ref28"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1983.1676295"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1977.5009294"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1982.1675992"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1962.tb03990.x"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/327070.327205"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/C-M.1981.220293"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1983.1676168"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1975.224335"},{"key":"ref2","first-page":"155","article-title":"modifications to improve the fault tolerance of the extra stage cube interconnection network","author":"adams","year":"1984","journal-title":"Proc 1984 Int Conf Parallel Processing"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1977.1674865"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1982.1676021"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1982.1676020"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1983.1676170"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/800015.808169"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1977.1674863"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1981.1675695"},{"key":"ref26","first-page":"155","article-title":"on fault-tolerant multistage interconnection networks","author":"reddy","year":"1984","journal-title":"Proc 1984 Int Conf Parallel Processing"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1972.5009049"}],"container-title":["IEEE Transactions on Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/12\/35266\/01676978.pdf?arnumber=1676978","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,22]],"date-time":"2025-07-22T18:02:44Z","timestamp":1753207364000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/1676978\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1987,7]]},"references-count":29,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tc.1987.1676978","relation":{},"ISSN":["0018-9340","1557-9956","2326-3814"],"issn-type":[{"type":"print","value":"0018-9340"},{"type":"electronic","value":"1557-9956"},{"type":"electronic","value":"2326-3814"}],"subject":[],"published":{"date-parts":[[1987,7]]}}}