{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,3]],"date-time":"2026-04-03T02:13:11Z","timestamp":1775182391129,"version":"3.50.1"},"reference-count":33,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2015,8,1]],"date-time":"2015-08-01T00:00:00Z","timestamp":1438387200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput."],"published-print":{"date-parts":[[2015,8,1]]},"DOI":"10.1109\/tc.2014.2361511","type":"journal-article","created":{"date-parts":[[2014,10,3]],"date-time":"2014-10-03T18:57:36Z","timestamp":1412362656000},"page":"2279-2292","source":"Crossref","is-referenced-by-count":12,"title":["Predicting the Effect of Memory Contention in Multi-Core Computers Using Analytic Performance Models"],"prefix":"10.1109","volume":"64","author":[{"given":"Shouvik","family":"Bardhan","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Daniel A.","family":"Menasce","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/339331.339418"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1998.694797"},{"key":"ref31","year":"0"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1006\/jpdc.2000.1710"},{"key":"ref10","year":"0"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2011.2167775"},{"key":"ref12","article-title":"Understanding and mitigating multi-core performance issues on the AMD Opteron architecture","year":"0"},{"key":"ref13","article-title":"Performance analysis guide for Intel Core i7 processor and Intel Xeon 5500 processors","author":"leventhal","year":"2009","journal-title":"Intel Perform Anal Guide"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"383","DOI":"10.1287\/opre.9.3.383","article-title":"A proof for the queuing formula: $L = \\lambda\\, W$","volume":"9","author":"d","year":"1961","journal-title":"Oper Res"},{"key":"ref15","author":"menasc\u00e9","year":"2004","journal-title":"Performance by Design Computer Capacity Planning by Example"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TE.2010.2102027"},{"key":"ref17","first-page":"55","article-title":"Memory performance and scalability of Intel’s and AMD’s dual-core processors: A case study","author":"peng","year":"2007","journal-title":"Proc IEEE Int Perform Comput Commun Conf"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/322186.322195"},{"key":"ref19","article-title":"Approximate analysis of multi-class closed networks of queues","author":"schweitzer","year":"1979","journal-title":"Proc Int Conf Stochastic Control Optim"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/800040.801409"},{"key":"ref4","first-page":"37","article-title":"Achieving application-centric performance targets via consolidation on multi-cores: Myth or reality","author":"chen","year":"0","journal-title":"Proc 21st Int Symp High-Perform Parallel Distrib Comput"},{"key":"ref27","year":"0"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/258612.258690"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1646353.1646371"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/107972.107982"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1353522.1353531"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MASCOT.2008.4770569"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2007.370584"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MASCOTS.2013.43"},{"key":"ref9","author":"hennessy","year":"0","journal-title":"Computer Architecture A Quantitative Approach"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/0166-5316(88)90015-6"},{"key":"ref20","first-page":"91","article-title":"Computerized closed queueing models of flexible manufacturing systems","volume":"12","author":"seidmann","year":"1987","journal-title":"Large Scale Syst J"},{"key":"ref22","article-title":"Approximate mean value analysis for closed queuing networks with multiple-server stations","author":"suri","year":"0","journal-title":"Proc Ind Eng Res Conf"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/1993744.1993747"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/1639949.1640116"},{"key":"ref23","year":"0"},{"key":"ref26","year":"0"},{"key":"ref25","year":"0"}],"container-title":["IEEE Transactions on Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/12\/7151894\/06915875.pdf?arnumber=6915875","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:01:08Z","timestamp":1642003268000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6915875\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,8,1]]},"references-count":33,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tc.2014.2361511","relation":{},"ISSN":["0018-9340"],"issn-type":[{"value":"0018-9340","type":"print"}],"subject":[],"published":{"date-parts":[[2015,8,1]]}}}