{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,13]],"date-time":"2026-05-13T12:39:57Z","timestamp":1778675997600,"version":"3.51.4"},"reference-count":44,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2015,10,1]],"date-time":"2015-10-01T00:00:00Z","timestamp":1443657600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61070136"],"award-info":[{"award-number":["61070136"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61173032"],"award-info":[{"award-number":["61173032"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Doctoral Fund of Ministry of Education of China","award":["20100032110041"],"award-info":[{"award-number":["20100032110041"]}]},{"name":"Doctoral Fund of Ministry of Education of China","award":["20131201110002"],"award-info":[{"award-number":["20131201110002"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput."],"published-print":{"date-parts":[[2015,10,1]]},"DOI":"10.1109\/tc.2015.2389846","type":"journal-article","created":{"date-parts":[[2015,1,8]],"date-time":"2015-01-08T19:53:17Z","timestamp":1420746797000},"page":"2926-2939","source":"Crossref","is-referenced-by-count":14,"title":["Reconfiguring Three-Dimensional Processor Arrays for Fault-Tolerance: Hardness and Heuristic Algorithms"],"prefix":"10.1109","volume":"64","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-1398-821X","authenticated-orcid":false,"given":"Guiyuan","family":"Jiang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jigang","family":"Wu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yajun","family":"Ha","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yi","family":"Wang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jizhou","family":"Sun","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/43.170991"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2002.1004594"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2003.822717"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-11197-1_38"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1016\/j.parco.2013.04.005"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/DFTVS.1998.732176"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2005.853603"},{"key":"ref36","doi-asserted-by":"crossref","first-page":"315","DOI":"10.1109\/TVLSI.2008.2009057","article-title":"Preprocessing and partial rerouting techniques for accelerating reconfiguration of degradable VLSI arrays","volume":"18","author":"wu","year":"2010","journal-title":"IEEE Trans Very Large Scale Integration Syst"},{"key":"ref35","first-page":"2318","article-title":"Self-reconfiguring of 1.5-track-switch mesh arrays with spares on one row and one column by simple built-in circuit","volume":"e87 d","author":"takanami","year":"2004","journal-title":"IEICE Trans Inf Syst"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1006\/jpdc.2001.1702"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2002108"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/DFTVS.2005.7"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2009.53"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2012.80"},{"key":"ref13","author":"stallings","year":"0","journal-title":"Operating Systems Internals and Design Principles"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837316"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2066586"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996809"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2007.4601933"},{"key":"ref18","first-page":"356","article-title":"Hybrid communication reconfigurable network on chip for MPSoC","author":"liu","year":"0","journal-title":"Proc 24th IEEE Int Conf Adv Inf Netw Appl"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.211"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/DFTVS.1994.630030"},{"key":"ref4","first-page":"115","article-title":"On the design and analysis of fault tolerant NoC architecture using spare routers","author":"koren","year":"0","journal-title":"Proc IEEE Int Symp Q Electron Des"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1016\/j.ins.2004.05.003"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/5.705525"},{"key":"ref6","first-page":"1","article-title":"Testing of UltraSPARC T1 microprocessor and its challenges n","author":"tan","year":"0","journal-title":"Proc IEEE Int Test Conf"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISPAN.1997.645137"},{"key":"ref5","year":"0"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2012.6378613"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2007.4437584"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024871"},{"key":"ref9","first-page":"160","article-title":"Rescue: A microarchitecture for testability and defect tolerance","author":"schuchman","year":"0","journal-title":"Proc 32nd Int Symp Comput Archit"},{"key":"ref1","year":"0"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2009.3"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2009.61"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1364\/OFC.2009.OTuA1"},{"key":"ref42","doi-asserted-by":"crossref","first-page":"243","DOI":"10.1109\/TC.2006.43","article-title":"Reconfiguration algorithms for power efficient vlsi subarrays with 4-port switches","volume":"55","author":"wu","year":"2006","journal-title":"IEEE Trans Comput"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/PRDC.2012.11"},{"key":"ref41","doi-asserted-by":"crossref","first-page":"553","DOI":"10.1109\/12.862215","article-title":"An efficient reconfiguration algorithm for degradable VLSI\/WSI arrays","volume":"49","author":"low","year":"2000","journal-title":"IEEE Trans Comput"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ECOC.2010.5621097"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4684-2001-2_9"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/12.862214"},{"key":"ref43","doi-asserted-by":"crossref","first-page":"929","DOI":"10.1109\/TPDS.2013.114","article-title":"Constructing sub-arrays with short interconnects from degradable VLSI arrays","volume":"25","author":"wu","year":"2014","journal-title":"IEEE Trans Parallel Distrib Syst"},{"key":"ref25","first-page":"213","article-title":"Fault-tolerant router with built-in self-test\/self-diagnosis and fault-isolation circuits for 2D-mesh based chip multiprocessor systems","volume":"16","author":"y","year":"2009","journal-title":"J Electr Eng"}],"container-title":["IEEE Transactions on Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/12\/7240148\/07004861.pdf?arnumber=7004861","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:04:00Z","timestamp":1642003440000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7004861\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,10,1]]},"references-count":44,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tc.2015.2389846","relation":{},"ISSN":["0018-9340"],"issn-type":[{"value":"0018-9340","type":"print"}],"subject":[],"published":{"date-parts":[[2015,10,1]]}}}