{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,4]],"date-time":"2026-04-04T06:18:42Z","timestamp":1775283522213,"version":"3.50.1"},"reference-count":38,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"9","license":[{"start":{"date-parts":[[2016,9,1]],"date-time":"2016-09-01T00:00:00Z","timestamp":1472688000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput."],"published-print":{"date-parts":[[2016,9,1]]},"DOI":"10.1109\/tc.2015.2506558","type":"journal-article","created":{"date-parts":[[2015,12,9]],"date-time":"2015-12-09T09:36:20Z","timestamp":1449653780000},"page":"2835-2847","source":"Crossref","is-referenced-by-count":29,"title":["Run-Time Recovery Mechanism for Transient and Permanent Hardware Faults Based on Distributed, Self-Organized Dynamic Partially Reconfigurable Systems"],"prefix":"10.1109","volume":"65","author":[{"given":"Victor","family":"Dumitriu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lev","family":"Kirischian","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Valeri","family":"Kirischian","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/CCECE.2012.6334961"},{"key":"ref33","year":"2008","journal-title":"A DTV Profile for Uncompressed High Speed Digital Interfaces"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2013.6732331"},{"key":"ref31","year":"2013","journal-title":"Partial Reconfiguration User Guide UG702 (v14 5)"},{"key":"ref30","year":"2015"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2004.1303100"},{"key":"ref36","year":"2013","journal-title":"KC705 Evaluation Board for the Kintex-7 FPGA User Guide - UG810 (vl 4)"},{"key":"ref35","year":"2013","journal-title":"7 Series FPGAs Configuration (v1 7)"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1504\/IJES.2010.039022"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2005.1568522"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-006-0017-6"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2013.80"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2008.4536503"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPSW.2010.5470800"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/SAMOS.2011.6045488"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/DDECS.2010.5491793"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2010.12"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2011.6132708"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/AERO.2013.6497203"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.281"},{"key":"ref4","author":"allen","year":"2009","journal-title":"Virtex-4VQ Dynamic and Mitigated Single Event Upset Characterization Summary"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ETSYM.2010.5512757"},{"key":"ref3","year":"2012","journal-title":"DS192 Radiation-Hardened Space-Grade Virtex-5QV Family Overview"},{"key":"ref6","first-page":"17","article-title":"Harsh environments: Space radiation environment, effects, and mitigation","volume":"28","author":"maurer","year":"2008","journal-title":"Johns Hopkins APL Tech Dig"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2012.6233006"},{"key":"ref5","article-title":"Xapp1088: Correcting single-event upsets in virtex-4 FPGA configuration memory (v1.0)","author":"carmichael","year":"2009"},{"key":"ref8","author":"abramovici","year":"1990","journal-title":"Digital Systems Testing and Testable Design"},{"key":"ref7","article-title":"CRRES microelectronics package flight data analysis","author":"stassinopoulos","year":"0"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2007.897402"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.888404"},{"key":"ref1","author":"kastensmidt","year":"2006","journal-title":"Fault-Tolerance Techniques for SRAM-based FPGAs"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ETSYM.2010.5512759"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2012.55"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2012.6233007"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2011.37"},{"key":"ref23","first-page":"1","article-title":"Re2da: Reliable and reconfigurable dynamic architecture","author":"pham","year":"0","journal-title":"International Workshop on Reconfigurable Communication Centric Systems-on-Chip"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2013.6651926"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPSW.2013.56"}],"container-title":["IEEE Transactions on Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/12\/7534965\/07349152.pdf?arnumber=7349152","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,11]],"date-time":"2021-10-11T02:33:51Z","timestamp":1633919631000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7349152\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,9,1]]},"references-count":38,"journal-issue":{"issue":"9"},"URL":"https:\/\/doi.org\/10.1109\/tc.2015.2506558","relation":{},"ISSN":["0018-9340"],"issn-type":[{"value":"0018-9340","type":"print"}],"subject":[],"published":{"date-parts":[[2016,9,1]]}}}