{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,13]],"date-time":"2026-06-13T07:02:17Z","timestamp":1781334137111,"version":"3.54.1"},"reference-count":45,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2020,11,1]],"date-time":"2020-11-01T00:00:00Z","timestamp":1604188800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,11,1]],"date-time":"2020-11-01T00:00:00Z","timestamp":1604188800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,11,1]],"date-time":"2020-11-01T00:00:00Z","timestamp":1604188800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"Center for Cyber Security"},{"name":"NYUAD REF scheme","award":["RE218"],"award-info":[{"award-number":["RE218"]}]},{"name":"Global PhD Fellowship at NYU\/NYUAD"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput."],"published-print":{"date-parts":[[2020,11,1]]},"DOI":"10.1109\/tc.2020.3020777","type":"journal-article","created":{"date-parts":[[2020,9,1]],"date-time":"2020-09-01T20:45:31Z","timestamp":1598993131000},"page":"1611-1625","source":"Crossref","is-referenced-by-count":43,"title":["2.5D Root of Trust: Secure System-Level Integration of Untrusted Chiplets"],"prefix":"10.1109","volume":"69","author":[{"given":"Mohammed","family":"Nabeel","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mohammed","family":"Ashraf","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8975-2414","authenticated-orcid":false,"given":"Satwik","family":"Patnaik","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2818-0459","authenticated-orcid":false,"given":"Vassos","family":"Soteriou","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ozgur","family":"Sinanoglu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5093-2939","authenticated-orcid":false,"given":"Johann","family":"Knechtel","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","first-page":"865","article-title":"Thermal covert channels on multi-core platforms","author":"masti","year":"2015","journal-title":"Proc Usenix Secur Symp"},{"key":"ref38","article-title":"The HDL framework for our 2.5D root of trust","year":"2020"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2017.2712156"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062293"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2019.2933572"},{"key":"ref30","first-page":"799","article-title":"Hardware-efficient logic camouflaging for monolithic 3D ICs","volume":"65","author":"yan","year":"2018","journal-title":"Trans Circuits Syst"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2016.7753258"},{"key":"ref36","article-title":"Intel unveils new tools in its advanced chip packaging toolbox","year":"2019"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2018.00066"},{"key":"ref34","author":"green","year":"2016"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.69"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1007\/11605805_1"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2016.2530092"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3133956.3133961"},{"key":"ref13","first-page":"523","article-title":"Hacking in darkness: Return-oriented programming against secure enclaves","author":"lee","year":"2017","journal-title":"Proc Usenix Secur Symp"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3266444.3266447"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.2197\/ipsjtsldm.10.45"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2018.2882603"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062957"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1115\/IPACK2011-52189"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203849"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2017.121"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3319535.3354252"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2227257"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2016.10"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2017.2658544"},{"key":"ref29","first-page":"495","article-title":"Securing computer hardware using 3D integrated circuit (IC) technology and split manufacturing for obfuscation","author":"imeson","year":"2013","journal-title":"Proc Usenix Secur Symp"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2017.2647955"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2016.51"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2014.2360535"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3312614.3312657"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2014.2348182"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-50057-7"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062927"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2008.4630087"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2016.348"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317775"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-28632-5_2"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2013.6487803"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/SP40000.2020.00057"},{"key":"ref23","article-title":"Xilinx stacked silicon interconnect technology delivers breakthrough FPGA capacity, bandwidth, and power efficiency","author":"dorsey","year":"2010"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-04138-9_28"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2013.6702367"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8715179"},{"key":"ref25","first-page":"222t","article-title":"Active-lite interposer for 2.5 & 3D integration","author":"hellings","year":"2015","journal-title":"Proc Symp VLSI Circuits"}],"container-title":["IEEE Transactions on Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/12\/9216709\/09184271.pdf?arnumber=9184271","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,27]],"date-time":"2022-04-27T14:09:57Z","timestamp":1651068597000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9184271\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,11,1]]},"references-count":45,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tc.2020.3020777","relation":{},"ISSN":["0018-9340","1557-9956","2326-3814"],"issn-type":[{"value":"0018-9340","type":"print"},{"value":"1557-9956","type":"electronic"},{"value":"2326-3814","type":"electronic"}],"subject":[],"published":{"date-parts":[[2020,11,1]]}}}