{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,17]],"date-time":"2025-12-17T08:48:22Z","timestamp":1765961302130,"version":"3.37.3"},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2021,10,1]],"date-time":"2021-10-01T00:00:00Z","timestamp":1633046400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,10,1]],"date-time":"2021-10-01T00:00:00Z","timestamp":1633046400000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"ERC","award":["724725"],"award-info":[{"award-number":["724725"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput."],"published-print":{"date-parts":[[2021,10,1]]},"DOI":"10.1109\/tc.2020.3022979","type":"journal-article","created":{"date-parts":[[2020,9,9]],"date-time":"2020-09-09T20:25:53Z","timestamp":1599683153000},"page":"1677-1690","source":"Crossref","is-referenced-by-count":62,"title":["Hardware Private Circuits: From Trivial Composition to Full Verification"],"prefix":"10.1109","volume":"70","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-5426-9345","authenticated-orcid":false,"given":"Gaetan","family":"Cassiers","sequence":"first","affiliation":[]},{"given":"Benjamin","family":"Gregoire","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5591-5799","authenticated-orcid":false,"given":"Itamar","family":"Levi","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7444-0285","authenticated-orcid":false,"given":"Francois-Xavier","family":"Standaert","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/2685616"},{"key":"ref32","article-title":"SILVER - Statistical independence and leakage verification","volume":"2020","author":"knichel","year":"2020","journal-title":"IACR Cryptol ePrint Arch"},{"key":"ref31","first-page":"311","article-title":"Tornado: Automatic generation of probing-secure masked bitsliced implementations","author":"bela\u00efd","year":"2020","journal-title":"Proc Annu Int Conf Theory Appl Cryptogr Techn"},{"key":"ref30","article-title":"Yosys-A free verilog synthesis suite","author":"wolf","year":"2013","journal-title":"Proc 21st Austrian Workshop Microelectron"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2018.8617841"},{"key":"ref10","doi-asserted-by":"crossref","first-page":"109","DOI":"10.1007\/s13389-018-0184-y","article-title":"A unified masking approach","volume":"8","author":"gro\u00dfand","year":"2018","journal-title":"J Cryptogr Eng"},{"key":"ref11","doi-asserted-by":"crossref","first-page":"1","DOI":"10.46586\/tches.v2018.i2.1-21","article-title":"Generic low-latency masking in hardware","volume":"2018","author":"gro\u00df","year":"2018","journal-title":"IACR Transactions on Cryptographic Hardware and Embedded Systems"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-49896-5_22"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-03329-3_12"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-45146-4_27"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.46586\/tches.v2019.i2.256-292"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1007\/11605805_14"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-15031-9_28"},{"key":"ref18","first-page":"410","article-title":"Higher-order side channel security and mask refreshing","author":"coron","year":"2013","journal-title":"Fast Software Encryption Third International Workshop Proceedings"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.46586\/tches.v2018.i3.89-120"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-52993-5_8"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/s00145-010-9086-6"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-53140-2_2"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/s00145-010-9085-7"},{"key":"ref6","article-title":"A note on the security of higher-order threshold implementations","volume":"2015","author":"reparaz","year":"2015","journal-title":"IACR Cryptol ePrint Arch"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-02777-2_24"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-45608-8_18"},{"key":"ref8","article-title":"Domain-oriented masking: Compact masked hardware implementations with arbitrary protection order","volume":"2016","author":"gro\u00df","year":"2016","journal-title":"IACR Cryptol ePrint Arch"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2996366.2996428"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/11545262_14"},{"key":"ref9","first-page":"95","article-title":"An efficient side-channel protected AES implementation with arbitrary protection order","author":"gro\u00df","year":"2017","journal-title":"Proc Cryptographers’ Track RSA Conf"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-74735-2_3"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-46800-5_18"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/2976749.2978427"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-78375-8_11"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2020.2971153"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-56620-7_20"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1007\/s13389-018-00202-2"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-29959-0_15"}],"container-title":["IEEE Transactions on Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/12\/9530592\/09190067.pdf?arnumber=9190067","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,2,21]],"date-time":"2022-02-21T22:03:56Z","timestamp":1645481036000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9190067\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,10,1]]},"references-count":34,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tc.2020.3022979","relation":{},"ISSN":["0018-9340","1557-9956","2326-3814"],"issn-type":[{"type":"print","value":"0018-9340"},{"type":"electronic","value":"1557-9956"},{"type":"electronic","value":"2326-3814"}],"subject":[],"published":{"date-parts":[[2021,10,1]]}}}