{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,10]],"date-time":"2025-09-10T22:36:41Z","timestamp":1757543801885,"version":"3.37.3"},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2022,10,1]],"date-time":"2022-10-01T00:00:00Z","timestamp":1664582400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2022,10,1]],"date-time":"2022-10-01T00:00:00Z","timestamp":1664582400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,10,1]],"date-time":"2022-10-01T00:00:00Z","timestamp":1664582400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CCF-1755874"],"award-info":[{"award-number":["CCF-1755874"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput."],"published-print":{"date-parts":[[2022,10,1]]},"DOI":"10.1109\/tc.2022.3140897","type":"journal-article","created":{"date-parts":[[2022,1,6]],"date-time":"2022-01-06T20:30:38Z","timestamp":1641501038000},"page":"2675-2686","source":"Crossref","is-referenced-by-count":7,"title":["Adaptively Reduced DRAM Caching for Energy-Efficient High Bandwidth Memory"],"prefix":"10.1109","volume":"71","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-3826-9123","authenticated-orcid":false,"given":"Payman","family":"Behnam","sequence":"first","affiliation":[{"name":"School of Computing, University of Utah, Salt Lake City, UT, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1496-5650","authenticated-orcid":false,"given":"Mahdi Nazm","family":"Bojnordi","sequence":"additional","affiliation":[{"name":"School of Computing, University of Utah, Salt Lake City, UT, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref5","article-title":"JEDEC standard: DDR4 SDRAM","author":"Association","year":"2012","journal-title":"JESD79\u20134"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1177\/109434209100500306"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/3085572"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1816038.1815970"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.18"},{"article-title":"DRAMPower: Open-source dram power & energy estimation tool","year":"2014","author":"Chandrasekar","key":"ref10"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2012.6168943"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750387"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2016.7446068"},{"journal-title":"JESD235","article-title":"High bandwidth memory (HBM) DRAM","year":"2013","key":"ref14"},{"volume-title":"Intel Xeon Phi Processor High Performance Programming: Knights Landing Edition","year":"2016","author":"Jeffers","key":"ref15"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.51"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/2508148.2485957"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2010.5416642"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522340"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.24"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2007.70816"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2001.937443"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/2872887.2750383"},{"key":"ref24","first-page":"469","article-title":"McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures","volume-title":"Proc. 42nd Annu. IEEE\/ACM Int. Symp. Microarchit.","author":"Li"},{"key":"ref25","first-page":"454","article-title":"Efficiently enabling conventional block sizes for very large die-stacked DRAM caches","volume-title":"Proc. 44th Annu. IEEE\/ACM Int. Symp. Microarchit.","author":"Loh"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056027"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/CSNT.2012.168"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/1273440.1250709"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.30"},{"key":"ref30","first-page":"355","article-title":"The evicted-address filter: A unified mechanism to address both cache pollution and thrashing","volume-title":"Proc. 21st Int. Conf. Parallel Archit. Compilation Techn.","author":"Seshadri"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/1555815.1555766"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2006.38"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/1816038.1815972"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.1995.524546"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306783"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2018.00036"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD46524.2019.00023"},{"key":"ref39","first-page":"1","article-title":"Banshee: Bandwidth-efficient DRAM caching via software\/hardware cooperation","volume-title":"Proc. 50th Annu. IEEE\/ACM Int. Symp. Microarchit.","author":"Yu"}],"container-title":["IEEE Transactions on Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/12\/9880482\/09672715.pdf?arnumber=9672715","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,13]],"date-time":"2024-01-13T22:51:10Z","timestamp":1705186270000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9672715\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,10,1]]},"references-count":34,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tc.2022.3140897","relation":{},"ISSN":["0018-9340","1557-9956","2326-3814"],"issn-type":[{"type":"print","value":"0018-9340"},{"type":"electronic","value":"1557-9956"},{"type":"electronic","value":"2326-3814"}],"subject":[],"published":{"date-parts":[[2022,10,1]]}}}