{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,24]],"date-time":"2026-07-24T23:08:34Z","timestamp":1784934514382,"version":"3.55.0"},"reference-count":44,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by-nc-nd\/4.0\/"}],"funder":[{"name":"TEXTAROSSA","award":["956831"],"award-info":[{"award-number":["956831"]}]},{"name":"Spanish Government","award":["PCI2021-121964"],"award-info":[{"award-number":["PCI2021-121964"]}]},{"name":"TEXTAROSSA","award":["PDC2022-133323-I00"],"award-info":[{"award-number":["PDC2022-133323-I00"]}]},{"DOI":"10.13039\/501100002809","name":"Generalitat de Catalunya","doi-asserted-by":"publisher","award":["2021 SGR 01007"],"award-info":[{"award-number":["2021 SGR 01007"]}],"id":[{"id":"10.13039\/501100002809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001807","name":"Funda\u00e7\u00e3o de Amparo \u00e0 Pesquisa do Estado de S\u00e3o Paulo","doi-asserted-by":"publisher","award":["2019\/26702-8"],"award-info":[{"award-number":["2019\/26702-8"]}],"id":[{"id":"10.13039\/501100001807","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput."],"published-print":{"date-parts":[[2024,1]]},"DOI":"10.1109\/tc.2023.3323781","type":"journal-article","created":{"date-parts":[[2023,10,12]],"date-time":"2023-10-12T17:39:01Z","timestamp":1697132341000},"page":"138-151","source":"Crossref","is-referenced-by-count":6,"title":["Enabling HW-Based Task Scheduling in Large Multicore Architectures"],"prefix":"10.1109","volume":"73","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9461-9183","authenticated-orcid":false,"given":"Lucas","family":"Morais","sequence":"first","affiliation":[{"name":"Barcelona Supercomputing Center, Barcelona, Spain"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0536-5183","authenticated-orcid":false,"given":"Carlos","family":"\u00c1lvarez","sequence":"additional","affiliation":[{"name":"Barcelona Supercomputing Center, Barcelona, Spain"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6064-7883","authenticated-orcid":false,"given":"Daniel","family":"Jim\u00e9nez-Gonz\u00e1lez","sequence":"additional","affiliation":[{"name":"Barcelona Supercomputing Center, Barcelona, Spain"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7427-9118","authenticated-orcid":false,"given":"Juan Miguel","family":"de Haro","sequence":"additional","affiliation":[{"name":"Barcelona Supercomputing Center, Barcelona, Spain"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4869-5190","authenticated-orcid":false,"given":"Guido","family":"Araujo","sequence":"additional","affiliation":[{"name":"University of Campinas, Campinas-SP, Brazil"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0004-5963-2165","authenticated-orcid":false,"given":"Michael","family":"Frank","sequence":"additional","affiliation":[{"name":"Arteris Inc., Campbell, CA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5746-4154","authenticated-orcid":false,"given":"Alfredo","family":"Goldman","sequence":"additional","affiliation":[{"name":"University of São Paulo, Sao Paulo-CEP, Brazil"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0417-3430","authenticated-orcid":false,"given":"Xavier","family":"Martorell","sequence":"additional","affiliation":[{"name":"Barcelona Supercomputing Center, Barcelona, Spain"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3503222.3507730"},{"key":"ref2","article-title":"Pthreads (7): Linux manual page","year":"2021"},{"key":"ref3","article-title":"MPI: A message-passing interface standard version 4.0","year":"2021"},{"key":"ref4","article-title":"CUDA C++ Programming Guide","year":"2023"},{"key":"ref5","first-page":"194","article-title":"Evaluating","volume-title":"Proc. Int. Works Lang. Compilers Parallel Comput.","author":"Berlin","year":"2003"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-88436-1_36"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/99.660313"},{"key":"ref8","article-title":"Intel oneAPI specification v1.2","year":"2022"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1142\/S0129626411000151"},{"key":"ref10","article-title":"The TensorFlow Library","year":"2023"},{"key":"ref11","volume-title":"PyTorch","year":"2023"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358271"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.13"},{"key":"ref14","volume-title":"OpenMP Application Program Interface Version 4.0","year":"2018"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2021.3086106"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3437801.3441601"},{"key":"ref17","article-title":"The rocket chip generator","author":"Asanovi\u0107","year":"2016"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228584"},{"key":"ref19","first-page":"56","article-title":"Nanos Mercurium: A research compiler for openMP","volume-title":"Proc. Eur. Works OpenMP","volume":"8","author":"Balart","year":"2004"},{"key":"ref20","first-page":"37","article-title":"Parsec 2.0: A new benchmark suite for chip-multiprocessors","volume-title":"Proc. 5th Annu. Workshop Model., Benchmarking Simul.","volume":"2011","author":"Bienia","year":"2009"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-11454-5_2"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/2486159.2486175"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1007\/s00607-017-0581-6"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/1816038.1815971"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155671"},{"key":"ref26","first-page":"1","article-title":"Hawkeye: Leveraging Beladys algorithm for improved cache replacement","volume-title":"Proc. 2nd Cache Replacement Championship","author":"Jain","year":"2017"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358319"},{"key":"ref28","first-page":"6237","article-title":"An imitation learning approach for cache replacement","volume-title":"Proc. Int. Conf. Mach. Learn.","author":"Liu","year":"2020"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2018.2814602"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2019.2907493"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2016.12"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080218"},{"key":"ref33","article-title":"Puppetmaster: A certified hardware architecture for task parallelism","author":"Perez-Lopez","year":"2021"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/2459316.2459320"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/1273440.1250683"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1016\/j.future.2014.12.010"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2017.48"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815993"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/3007787.3001177"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO56248.2022.00046"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO56248.2022.00090"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1145\/3529336.3530823"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM51124.2021.00032"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1145\/3503222.3507706"}],"container-title":["IEEE Transactions on Computers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/12\/10372122\/10284544.pdf?arnumber=10284544","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,12]],"date-time":"2024-01-12T04:32:24Z","timestamp":1705033944000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10284544\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,1]]},"references-count":44,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tc.2023.3323781","relation":{},"ISSN":["0018-9340","1557-9956","2326-3814"],"issn-type":[{"value":"0018-9340","type":"print"},{"value":"1557-9956","type":"electronic"},{"value":"2326-3814","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,1]]}}}