{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,6]],"date-time":"2025-06-06T10:25:25Z","timestamp":1749205525182},"reference-count":15,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[1985,7,1]],"date-time":"1985-07-01T00:00:00Z","timestamp":489024000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[1985,7]]},"DOI":"10.1109\/tcad.1985.1270121","type":"journal-article","created":{"date-parts":[[2004,4,29]],"date-time":"2004-04-29T00:28:59Z","timestamp":1083198539000},"page":"250-263","source":"Crossref","is-referenced-by-count":2,"title":["The S-Algorithm: A Promising Solution for Systematic Functional Test Generation"],"prefix":"10.1109","volume":"4","author":[{"family":"Tonysheng Lin","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S.Y.H.","family":"Su","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1980.1675602"},{"key":"ref11","article-title":"Functional test generation of digital LSI\/ VLSI systems using machine symbolic execution technique","author":"lin","year":"1984","journal-title":"Dig Papers 1984 Int Test Conf"},{"key":"ref12","author":"lin","year":"1985","journal-title":"Functional Test Generation of digital LSi\/VLSI Systems using Macjine Symbolic Execution Technique"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/C-M.1978.218139"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TSE.1976.233817"},{"key":"ref15","author":"oakley","year":"1979","journal-title":"Symbolic Execution of Formal Machine Descriptions"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1984.1585847"},{"key":"ref3","first-page":"75","article-title":"Computer-aided design and testing of digital systems and circuits","author":"su","year":"1983","journal-title":"Proc Jordan Int Electrical & Electronics Engineering Conf"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1982.1675879"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1975.224205"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/12.5992"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1988.207805"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MC.1980.1653524"},{"key":"ref1","article-title":"Testing functional faults in digital systems described by register transfer language","author":"su","year":"1981","journal-title":"Dig papers 1981 Int Test Conf"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1984.1676471"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/43\/28433\/01270121.pdf?arnumber=1270121","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:39:42Z","timestamp":1638218382000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1270121\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1985,7]]},"references-count":15,"journal-issue":{"issue":"3","published-print":{"date-parts":[[1985,7]]}},"URL":"https:\/\/doi.org\/10.1109\/tcad.1985.1270121","relation":{},"ISSN":["0278-0070"],"issn-type":[{"value":"0278-0070","type":"print"}],"subject":[],"published":{"date-parts":[[1985,7]]}}}