{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,9,13]],"date-time":"2023-09-13T17:52:19Z","timestamp":1694627539142},"reference-count":13,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[1987,7,1]],"date-time":"1987-07-01T00:00:00Z","timestamp":552096000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[1987,7]]},"DOI":"10.1109\/tcad.1987.1270312","type":"journal-article","created":{"date-parts":[[2004,4,28]],"date-time":"2004-04-28T20:28:59Z","timestamp":1083184139000},"page":"666-677","source":"Crossref","is-referenced-by-count":1,"title":["A Distributed Approach to Timing Verification of Synchronous and Asynchronous Digital Designs"],"prefix":"10.1109","volume":"6","author":[{"given":"S.","family":"Ghosh","sequence":"first","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"345","article-title":"Self-timed VLSI systems","author":"seitz","year":"1979","journal-title":"Proc Caltech Conf VLSI"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/1480083.1480112"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/800153.804937"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1978.1585183"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1982.1585558"},{"key":"ref3","author":"ghosh","year":"1984","journal-title":"RDV A Rule-Based Generalized Design Verifier"},{"key":"ref6","author":"magnhagen","year":"1977","journal-title":"Probability based verification of time margins in digital designs"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1983.1585685"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/978-94-010-2864-6"},{"key":"ref7","first-page":"139","article-title":"Verification of timing constraints on large digital systems","author":"mcwilliams","year":"1980","journal-title":"Proc 17th Design Automat Conf"},{"key":"ref2","author":"luckham","year":"1981","journal-title":"ADAM?An ADA based language for multiprocessing"},{"key":"ref1","year":"1983","journal-title":"Reference Manual for the Ada Programming Language"},{"key":"ref9","author":"roth","year":"1980","journal-title":"Computer timing verification"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/43\/28442\/01270312.pdf?arnumber=1270312","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T15:39:46Z","timestamp":1638200386000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1270312\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1987,7]]},"references-count":13,"journal-issue":{"issue":"4","published-print":{"date-parts":[[1987,7]]}},"URL":"https:\/\/doi.org\/10.1109\/tcad.1987.1270312","relation":{},"ISSN":["0278-0070"],"issn-type":[{"value":"0278-0070","type":"print"}],"subject":[],"published":{"date-parts":[[1987,7]]}}}