{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,10,24]],"date-time":"2023-10-24T15:36:45Z","timestamp":1698161805245},"reference-count":10,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[1987,9,1]],"date-time":"1987-09-01T00:00:00Z","timestamp":557452800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[1987,9]]},"DOI":"10.1109\/tcad.1987.1270322","type":"journal-article","created":{"date-parts":[[2004,4,29]],"date-time":"2004-04-29T00:28:59Z","timestamp":1083198539000},"page":"795-801","source":"Crossref","is-referenced-by-count":91,"title":["Optimal Chaining of CMOS Transistors in a Functional Cell"],"prefix":"10.1109","volume":"6","author":[{"given":"S.","family":"Wimer","sequence":"first","affiliation":[]},{"given":"R.Y.","family":"Pinter","sequence":"additional","affiliation":[]},{"given":"J.A.","family":"Feldman","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1983.1585634"},{"key":"ref3","first-page":"172","article-title":"Sc2?A hybrid automatic layout system","author":"hill","year":"1985","journal-title":"Proc ICCAD"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1981.1675787"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1016\/S0167-9260(86)80003-7"},{"key":"ref5","author":"mavor","year":"1983","journal-title":"Introduction to MOS LSI Design"},{"key":"ref8","first-page":"327","author":"nair","year":"1985","journal-title":"VLSI Algorithms and Architectures"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-16766-8_11"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1147\/rd.285.0572"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/800263.809239"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/362342.362367"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/43\/28443\/01270322.pdf?arnumber=1270322","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:39:46Z","timestamp":1638218386000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1270322\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1987,9]]},"references-count":10,"journal-issue":{"issue":"5","published-print":{"date-parts":[[1987,9]]}},"URL":"https:\/\/doi.org\/10.1109\/tcad.1987.1270322","relation":{},"ISSN":["0278-0070"],"issn-type":[{"value":"0278-0070","type":"print"}],"subject":[],"published":{"date-parts":[[1987,9]]}}}