{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,14]],"date-time":"2026-03-14T22:06:19Z","timestamp":1773525979551,"version":"3.50.1"},"reference-count":27,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[1987,9,1]],"date-time":"1987-09-01T00:00:00Z","timestamp":557452800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[1987,9]]},"DOI":"10.1109\/tcad.1987.1270329","type":"journal-article","created":{"date-parts":[[2004,4,29]],"date-time":"2004-04-29T00:28:59Z","timestamp":1083198539000},"page":"863-878","source":"Crossref","is-referenced-by-count":33,"title":["Algorithmic Aspects of One-Dimensional Layout Compaction"],"prefix":"10.1109","volume":"6","author":[{"given":"J.","family":"Doenhardt","sequence":"first","affiliation":[]},{"given":"T.","family":"Lengauer","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"crossref","DOI":"10.21236\/AD0705364","author":"harary","year":"1969","journal-title":"Graph Theory"},{"key":"ref11","first-page":"139","article-title":"The HILL system: A design environment for the hierarchical specification, compaction, and simulation of integrated circuit layouts","author":"lengauer","year":"1984","journal-title":"Proc MIT-Conference on Advanced Research in VLSI"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1984.1585785"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1983.1585635"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/SFCS.1982.92"},{"key":"ref15","first-page":"219","article-title":"Efficient algorithms for the constraint generation of integrated circuit layout compaction","author":"lengauer","year":"1983","journal-title":"Proc 9th Workshop on Graphtheoretic Concepts in Computer Science"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1016\/0196-6774(84)90020-8"},{"key":"ref17","first-page":"389","article-title":"Channel routing in a general cell environment","volume":"85","author":"lauther","year":"1985","journal-title":"VLSI"},{"key":"ref18","first-page":"33","author":"lengauer","year":"1986","journal-title":"VLSI Algorithms"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1983.1270022"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/317825.317835"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1983.1585622"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"87","DOI":"10.1090\/qam\/102435","article-title":"On a routing problem","volume":"16","author":"bellman","year":"1958","journal-title":"Quart Appl Math"},{"key":"ref6","author":"doenhardt","year":"1984","journal-title":"Kompaktierung geometrischer layouts"},{"key":"ref5","author":"hsueh","year":"1979","journal-title":"Symbolic layout and compaction of integrated circuits"},{"key":"ref8","author":"golumbic","year":"1980","journal-title":"Algorithmic Graph Theory and Perfect Graphs"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1016\/0010-4485(81)90316-X"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1137\/0201008"},{"key":"ref9","author":"garey","year":"1979","journal-title":"Computers and Intractability A Guide to the Theory of NP-Completeness"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/800160.805107"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1984.1585791"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1981.tb03383.x"},{"key":"ref21","author":"mead","year":"1980","journal-title":"Introduction of VLSI Systems"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1016\/S0167-9260(83)80019-4"},{"key":"ref23","doi-asserted-by":"crossref","first-page":"595","DOI":"10.1145\/800139.804592","article-title":"SLIM?The translation of symbolic layouts into mask data","author":"dunlop","year":"1980","journal-title":"Proc 25th IEEE Design Automation Conf"},{"key":"ref26","first-page":"374","article-title":"TRICKY?Symbolic layout system for integrated circuits","author":"hanczakowski","year":"1981","journal-title":"VLSI Spring Compcon"},{"key":"ref25","first-page":"289","article-title":"STICKS?A graphical compiler for high level LSI design","author":"williams","year":"1978","journal-title":"Proc Nat Comp Conf"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/43\/28443\/01270329.pdf?arnumber=1270329","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,13]],"date-time":"2024-01-13T07:42:39Z","timestamp":1705131759000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1270329\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1987,9]]},"references-count":27,"journal-issue":{"issue":"5","published-print":{"date-parts":[[1987,9]]}},"URL":"https:\/\/doi.org\/10.1109\/tcad.1987.1270329","relation":{},"ISSN":["0278-0070"],"issn-type":[{"value":"0278-0070","type":"print"}],"subject":[],"published":{"date-parts":[[1987,9]]}}}