{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,9,13]],"date-time":"2023-09-13T17:52:47Z","timestamp":1694627567048},"reference-count":18,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[1987,11,1]],"date-time":"1987-11-01T00:00:00Z","timestamp":562723200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[1987,11]]},"DOI":"10.1109\/tcad.1987.1270338","type":"journal-article","created":{"date-parts":[[2004,4,28]],"date-time":"2004-04-28T20:28:59Z","timestamp":1083184139000},"page":"965-980","source":"Crossref","is-referenced-by-count":26,"title":["Realistic Yield Simulation for VLSIC Structural Failures"],"prefix":"10.1109","volume":"6","author":[{"family":"Ihao Chen","sequence":"first","affiliation":[]},{"given":"A.J.","family":"Strojwas","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","author":"papoulis","year":"1965","journal-title":"Probability random variables and stochastic processes"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1986.1270222"},{"key":"ref12","author":"romano","year":"1977","journal-title":"Applied Statistics for Science and Industry"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1147\/rd.276.0549"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/0038-1101(81)90006-X"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1986.1270182"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1986.1270225"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1974.1050474"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1147\/rd.243.0398"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1963.2488"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1974.1050475"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1983.12619"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/0038-1101(79)90114-X"},{"key":"ref8","author":"mead","year":"1980","journal-title":"Introduction to VLSI System"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"166","DOI":"10.1109\/TCAD.1985.1270112","article-title":"Modeling of lithography related yield losses for CAD of VLSI circuits","volume":"cad 4","author":"maly","year":"1985","journal-title":"IEEE Trans Computer-Aided Design"},{"key":"ref2","article-title":"Integrated circuit test structures and test methods","author":"linholm","year":"1981","journal-title":"Solid State Technol"},{"key":"ref1","author":"burden","year":"1985","journal-title":"Numerical Analysis"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1964.3442"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/43\/28444\/01270338.pdf?arnumber=1270338","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T15:39:46Z","timestamp":1638200386000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1270338\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1987,11]]},"references-count":18,"journal-issue":{"issue":"6","published-print":{"date-parts":[[1987,11]]}},"URL":"https:\/\/doi.org\/10.1109\/tcad.1987.1270338","relation":{},"ISSN":["0278-0070"],"issn-type":[{"value":"0278-0070","type":"print"}],"subject":[],"published":{"date-parts":[[1987,11]]}}}