{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,23]],"date-time":"2026-04-23T14:45:07Z","timestamp":1776955507691,"version":"3.51.4"},"reference-count":0,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2007,5,1]],"date-time":"2007-05-01T00:00:00Z","timestamp":1177977600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2007,5,1]],"date-time":"2007-05-01T00:00:00Z","timestamp":1177977600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2007,5,1]],"date-time":"2007-05-01T00:00:00Z","timestamp":1177977600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2007,5]]},"DOI":"10.1109\/tcad.2007.8361590","type":"journal-article","created":{"date-parts":[[2020,3,13]],"date-time":"2020-03-13T20:22:51Z","timestamp":1584130971000},"page":"977-982","source":"Crossref","is-referenced-by-count":12,"title":["Coding for reliable on-chip buses: a class of fundamental bounds and practical codes"],"prefix":"10.1109","volume":"26","author":[{"given":"Srinivasa R.","family":"Sridhara","sequence":"first","affiliation":[{"name":"DSP Solutions R&D Center, Texas Instruments, Dallas, TX 75243 USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Naresh R.","family":"Shanbhag","sequence":"additional","affiliation":[{"name":"Coordinated Science Laboratory and the Department of Electrical and Computer Engineering, University of Illinois, Urbana\u2013Champaign, IL 61801 USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/4193559\/08361590.pdf?arnumber=8361590","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,2,20]],"date-time":"2024-02-20T18:51:51Z","timestamp":1708455111000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8361590\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,5]]},"references-count":0,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2007.8361590","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2007,5]]}}}