{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,10]],"date-time":"2026-04-10T16:06:31Z","timestamp":1775837191208,"version":"3.50.1"},"reference-count":22,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2012,2,1]],"date-time":"2012-02-01T00:00:00Z","timestamp":1328054400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2012,2]]},"DOI":"10.1109\/tcad.2011.2173491","type":"journal-article","created":{"date-parts":[[2012,1,30]],"date-time":"2012-01-30T21:18:53Z","timestamp":1327958333000},"page":"217-227","source":"Crossref","is-referenced-by-count":15,"title":["Integrated Clock Mesh Synthesis With Incremental Register Placement"],"prefix":"10.1109","volume":"31","author":[{"given":"Jianchao","family":"Lu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xiaomi","family":"Mao","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Baris","family":"Taskin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1514932.1514964"},{"key":"ref11","first-page":"15","article-title":"Timingdriven variation-aware nonuniform clock mesh synthesis","author":"abdelhadi","year":"2010","journal-title":"Proc GLSVLSI"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837295"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5653737"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/1960397.1960426"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2011.5937789"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2005.848821"},{"key":"ref17","author":"cormen","year":"2001","journal-title":"Introduction to Algorithms"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1063\/1.1697872"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/EDTC.1996.494154"},{"key":"ref4","first-page":"402","article-title":"The design and analysis of the clock distribution network for a 1.2 GHz Alpha microprocessor","author":"xanthopoulos","year":"2001","journal-title":"Proc IEEE ISSCC"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1996.545607"},{"key":"ref6","first-page":"144","article-title":"The clock distribution of the Power4 microprocessor","volume":"1","author":"restle","year":"2002","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/4.918917"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2007737"},{"key":"ref7","first-page":"1512","article-title":"Clock generation and distribution of a dual-core Xeon processor with 16 MB L3 cache","author":"tam","year":"2006","journal-title":"Proc IEEE ISSCC"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/1123008.1123038"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/4.962284"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2008.4483951"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/293625.293628"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/99.714603"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/1735023.1735058"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/43\/6132613\/06132652.pdf?arnumber=6132652","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:53:09Z","timestamp":1633909989000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6132652\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,2]]},"references-count":22,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2011.2173491","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,2]]}}}