{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,23]],"date-time":"2026-10-23T21:15:08Z","timestamp":1792790108241,"version":"4.5.0"},"reference-count":53,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2013,2,1]],"date-time":"2013-02-01T00:00:00Z","timestamp":1359676800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2013,2]]},"DOI":"10.1109\/tcad.2012.2217964","type":"journal-article","created":{"date-parts":[[2013,1,21]],"date-time":"2013-01-21T14:09:44Z","timestamp":1358777384000},"page":"261-274","source":"Crossref","is-referenced-by-count":70,"title":["NICSLU: An Adaptive Sparse Matrix Solver for Parallel Circuit Simulation"],"prefix":"10.1109","volume":"32","author":[{"given":"Xiaoming","family":"Chen","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yu","family":"Wang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Huazhong","family":"Yang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.884576"},{"key":"ref38","first-page":"113","article-title":"New multilevel Newton–Raphson method for parallel circuit simulation","author":"honkala","year":"2001","journal-title":"Proc ECCTD"},{"key":"ref33","first-page":"1","article-title":"Large power grid analysis using domain decomposition","volume":"1","author":"zhou","year":"2006","journal-title":"Proc DATE"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/81.678468"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2059718"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2009.4796514"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TCS.1979.1084693"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/43.980256"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1049\/ip-gtd:20010583"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2009.4796513"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-19475-7_33"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2010.5537195"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2009.5280743"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1137\/1.9780898718881"},{"key":"ref1","author":"nagel","year":"1975","journal-title":"SPICE 2 A Computer Program to Stimulate Semiconductor Circuits"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2012.64"},{"key":"ref22","author":"trottenberg","year":"2001","journal-title":"Multigrid"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.6028\/jres.049.044"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105373"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105374"},{"key":"ref26","author":"kapre","year":"2010","journal-title":"SPICE2A spatial parallel architecture for accelerating the spice circuit simulator"},{"key":"ref25","first-page":"1","article-title":"Sparse LU decomposition using FPGA","author":"johnson","year":"2008","journal-title":"Proc Workshop State-of-the-Art in Scientific and Parallel Computing (PARA)"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1145\/355780.355790"},{"key":"ref51","year":"2012","journal-title":"Critical Section"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1007\/s101070100263"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1145\/2049662.2049663"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/779359.779361"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/992200.992206"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1982.1270004"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1016\/j.parco.2005.07.004"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1016\/j.future.2003.07.011"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1137\/1034004"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.826549"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.882483"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-663-10922-8"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687477"},{"key":"ref19","author":"saad","year":"2004","journal-title":"Iterative methods for sparse linear systems"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1137\/0909058"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2009.5377665"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2011.2164148"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1824801.1824815"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1137\/S0895479897317685"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2012.6164974"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1137\/S0895479887139455"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1137\/S0895479895291765"},{"key":"ref46","year":"2011","journal-title":"The HSL Mathematical Software Library"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1137\/S0895479899358443"},{"key":"ref48","author":"li","year":"1996","journal-title":"Sparse gaussian elimination on high performance computers"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1145\/1024074.1024081"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4681554"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391531"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1137\/S0895479897317661"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2067870"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/43\/6416083\/06416098.pdf?arnumber=6416098","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T15:40:24Z","timestamp":1638200424000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6416098\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,2]]},"references-count":53,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2012.2217964","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,2]]}}}