{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,9,25]],"date-time":"2026-09-25T03:26:39Z","timestamp":1790306799084,"version":"4.1.0"},"reference-count":36,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2013,4,1]],"date-time":"2013-04-01T00:00:00Z","timestamp":1364774400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2013,4]]},"DOI":"10.1109\/tcad.2012.2228742","type":"journal-article","created":{"date-parts":[[2013,3,15]],"date-time":"2013-03-15T18:50:47Z","timestamp":1363373447000},"page":"559-571","source":"Crossref","is-referenced-by-count":70,"title":["On Effective Through-Silicon Via Repair for 3-D-Stacked ICs"],"prefix":"10.1109","volume":"32","author":[{"given":"Li","family":"Jiang","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Qiang","family":"Xu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Bill","family":"Eklow","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref33","article-title":"New multilayer stacking technology and trial manufacture","author":"miyakawa","year":"2007","journal-title":"Proc 3-D Archit Semicond Integr Packag"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/5.705525"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/DFTVS.2005.28"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/12.21146"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2005.1609348"},{"key":"ref35","first-page":"1","article-title":"3-D integration by Cu&#x2013;Cu thermo-compression bonding of extremely thinned bulk-Si die containing 10 <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\mu{\\rm m}$<\/tex><\/formula> pitch through-Si vias","author":"swinnen","year":"2006","journal-title":"Proc IEDM"},{"key":"ref34","first-page":"416","article-title":"A 3-D prototyping chip based on a wafer-level stacking technology","author":"miyakawa","year":"2009","journal-title":"Proc Asia South Pacific Des Autom Conf"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISSM.2007.4446880"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2012.6165052"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2009.125"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5654160"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/VDAT.2010.5496702"},{"key":"ref15","first-page":"220","article-title":"Strategies for improving the parametric yield and profits of 3-D ICs","author":"ferri","year":"2007","journal-title":"Proc Int Conf Comput -Aided Des"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2008.5388564"},{"key":"ref17","first-page":"598","article-title":"A low-overhead fault tolerance scheme for TSV-based 3-D network on chip links","author":"loi","year":"2008","journal-title":"Proc IEEE\/ACM Int Conf Comput -Aided Des"},{"key":"ref18","first-page":"166","article-title":"TSV redundancy: Architecture and design issues in 3-D IC","author":"hsieh","year":"2010","journal-title":"Proc Des Autom Test Eur Conf Exhibit"},{"key":"ref19","first-page":"6","article-title":"Factors affecting copper filling process within high aspect ratio deep vias for 3-D chip stacking","author":"kim","year":"2006","journal-title":"Proc Electron Compon Technol Conf"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/1868237.1868241"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1557\/PROC-0970-Y03-06"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/290179.290181"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2034408"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.15"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/5.705525"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2006.346849"},{"key":"ref8","first-page":"1","article-title":"A customized design of DRAM controller for on-chip 3-D DRAM stacking","author":"zhang","year":"2010","journal-title":"Proc IEEE Custom Integr Circuits Conf"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2010.5416628"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2009.4977515"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2009.4796486"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2005.1494016"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2009.5173329"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1147\/rd.504.0491"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2009.5355573"},{"key":"ref24","first-page":"6","article-title":"On effective TSV repair for 3D-stacked ICs","author":"jiang","year":"2012","journal-title":"Proc Des Autom Test Eur Conf Exhibit"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2011.37"},{"key":"ref26","first-page":"220","article-title":"Test architecture design and optimization for three-dimensional SoCs","author":"jiang","year":"2009","journal-title":"Proc Des Autom Test Eur Conf Exhibit"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ICWSI.1990.63907"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/6480843\/06480868.pdf?arnumber=6480868","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:40:25Z","timestamp":1638218425000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6480868\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,4]]},"references-count":36,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2012.2228742","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,4]]}}}