{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,6,9]],"date-time":"2024-06-09T05:17:34Z","timestamp":1717910254185},"reference-count":25,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2014,3,1]],"date-time":"2014-03-01T00:00:00Z","timestamp":1393632000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2014,3]]},"DOI":"10.1109\/tcad.2013.2291659","type":"journal-article","created":{"date-parts":[[2014,2,13]],"date-time":"2014-02-13T19:18:37Z","timestamp":1392319117000},"page":"370-383","source":"Crossref","is-referenced-by-count":24,"title":["TPaR: Place and Route Tools for the Dynamic Reconfiguration of the FPGA's Interconnect Network"],"prefix":"10.1109","volume":"33","author":[{"given":"Elias","family":"Vansteenkiste","sequence":"first","affiliation":[]},{"given":"Brahim Al","family":"Farisi","sequence":"additional","affiliation":[]},{"given":"Karel","family":"Bruneel","sequence":"additional","affiliation":[]},{"given":"Dirk","family":"Stroobandt","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"crossref","first-page":"213","DOI":"10.1007\/3-540-63465-7_226","volume":"1304","author":"betz","year":"1997","journal-title":"Field-Programmable Logic Applicat"},{"key":"ref11","year":"2013","journal-title":"Partial Reconfiguration User Guide"},{"key":"ref12","year":"1999","journal-title":"Architecture and CAD for Deep-Submicron FPGAs"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/275107.275134"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/329166.329208"},{"key":"ref15","first-page":"690","article-title":"RISA: Accurate and efficient placement routability modeling","author":"cheng","year":"1994","journal-title":"Proc IEEE\/ACM ICCAD"},{"key":"ref16","author":"betz","year":"0","journal-title":"The FPGA place-and-route challenge"},{"key":"ref17","first-page":"96","article-title":"A novel tool flow for increased routing configuration similarity in multimode circuits","author":"farisi","year":"2013","journal-title":"Proc IEEE Comput Soc Annu Symp VLSI"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/201310.201328"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2004.1393249"},{"key":"ref4","year":"2012","journal-title":"The TLUT tool flow"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2003695.2003703"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2012.6339224"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.884574"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-28365-9_32"},{"key":"ref7","first-page":"207","volume":"5992","author":"bruneel","year":"2010","journal-title":"TROUTE A reconfigurability-aware FPGA router"},{"key":"ref2","year":"2010","journal-title":"Increasing Design Functionality with Partial and Dynamic Reconfiguration in 28-nm FPGAs"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2012.6339225"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1998.707902"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2013.6645516"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1953.tb01433.x"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2008.4580165"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.2003.1227236"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2004.1303100"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/2491477.2491479"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/6740003\/06740026.pdf?arnumber=6740026","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:31:33Z","timestamp":1642005093000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6740026\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,3]]},"references-count":25,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2013.2291659","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,3]]}}}