{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,31]],"date-time":"2025-12-31T12:15:17Z","timestamp":1767183317989},"reference-count":36,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2014,12,1]],"date-time":"2014-12-01T00:00:00Z","timestamp":1417392000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"Strategic Emerging Industry Key Technology Special Project of Guangdong Province","award":["2011168014","2011912004"],"award-info":[{"award-number":["2011168014","2011912004"]}]},{"name":"SYSU-CMU Shunde International Joint Research Institute"},{"name":"A*STAR under the Human-Centered Cyber-Physical Systems Grant, and the Human Six Sense Program"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2014,12]]},"DOI":"10.1109\/tcad.2014.2361661","type":"journal-article","created":{"date-parts":[[2014,10,7]],"date-time":"2014-10-07T18:48:05Z","timestamp":1412707685000},"page":"1832-1845","source":"Crossref","is-referenced-by-count":10,"title":["High-Level Synthesis With Behavioral-Level Multicycle Path Analysis"],"prefix":"10.1109","volume":"33","author":[{"given":"Hongbin","family":"Zheng","sequence":"first","affiliation":[]},{"given":"Swathi T.","family":"Gurumani","sequence":"additional","affiliation":[]},{"given":"Liwei","family":"Yang","sequence":"additional","affiliation":[]},{"given":"Deming","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Kyle","family":"Rupnow","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","author":"gajski","year":"1992","journal-title":"High-Level Synthesis Introduction to Chip and System Design"},{"key":"ref32","article-title":"On predicated execution","author":"park","year":"1991"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/567067.567085"},{"key":"ref30","article-title":"Control and data dependence for program transformations","author":"towle","year":"1976"},{"key":"ref36","first-page":"1192","article-title":"CHStone: A benchmark program suite for practical C-based high-level synthesis","author":"hara","year":"2008","journal-title":"Proc Int Symp Circuits Syst (ISCAS)"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687410"},{"key":"ref34","first-page":"370","article-title":"Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains","author":"cheng","year":"2007","journal-title":"Proc Int Conf Comput -Aided Design (ICCAD)"},{"key":"ref10","year":"2012","journal-title":"Catapult C Synthesis"},{"key":"ref11","year":"2012","journal-title":"Cynthesizer"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2012.6339272"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2110592"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/53990.54022"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090938"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/43.406708"},{"key":"ref17","doi-asserted-by":"crossref","first-page":"425","DOI":"10.1145\/196244.196448","article-title":"performance optimization using exact sensitization","author":"saldanha","year":"1994","journal-title":"31st Design Automation Conference"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1998.742902"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2004.1337564"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5457001"},{"key":"ref4","article-title":"xPilot: A platform-based behavioral synthesis system","volume":"5","author":"chen","year":"2005","journal-title":"Proc SRC TECHCON"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1147025"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4020-8588-8_9"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.2003.1183177"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/115372.115320"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.234"},{"key":"ref8","year":"2014","journal-title":"Synphony C Compiler Synopsys"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/SASP.2009.5226333"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/1950413.1950423"},{"key":"ref9","year":"2014","journal-title":"C-to-Silicon Compiler Cadence"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2554688.2554775"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/43.908436"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.825872"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/370155.370576"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2013.6645541"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2008.4681547"},{"key":"ref26","first-page":"780","article-title":"A gradual scheduling framework for problem size reduction and cross basic block parallelism exploitation in high-level synthesis","author":"zheng","year":"2013","journal-title":"Proc Asia South Pacific Design Autom Conf (ASP-DAC)"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2004.1281665"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/6951450\/06917054.pdf?arnumber=6917054","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:01:00Z","timestamp":1642003260000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6917054"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,12]]},"references-count":36,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2014.2361661","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,12]]}}}