{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,9]],"date-time":"2026-06-09T09:18:28Z","timestamp":1780996708048,"version":"3.54.1"},"reference-count":39,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2015,5,1]],"date-time":"2015-05-01T00:00:00Z","timestamp":1430438400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2015,5,1]],"date-time":"2015-05-01T00:00:00Z","timestamp":1430438400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2015,5,1]],"date-time":"2015-05-01T00:00:00Z","timestamp":1430438400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CCF-0644316"],"award-info":[{"award-number":["CCF-0644316"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CCF-1218906"],"award-info":[{"award-number":["CCF-1218906"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Semiconductor Research Corporation (SRC) Task 2414.001"},{"name":"National Science Foundation of China","award":["61128010"],"award-info":[{"award-number":["61128010"]}]},{"name":"IBM Scholarship"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2015,5]]},"DOI":"10.1109\/tcad.2015.2401571","type":"journal-article","created":{"date-parts":[[2015,2,9]],"date-time":"2015-02-09T19:35:30Z","timestamp":1423510530000},"page":"726-739","source":"Crossref","is-referenced-by-count":33,"title":["Methodology for Standard Cell Compliance and Detailed Placement for Triple Patterning Lithography"],"prefix":"10.1109","volume":"34","author":[{"given":"Bei","family":"Yu","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Xiaoqing","family":"Xu","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jhih-Rong","family":"Gao","sequence":"additional","affiliation":[{"name":"Cadence Design Systems, Austin, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yibo","family":"Lin","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Zhuo","family":"Li","sequence":"additional","affiliation":[{"name":"Cadence Design Systems, Austin, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Charles J.","family":"Alpert","sequence":"additional","affiliation":[{"name":"Cadence Design Systems, Austin, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"David Z.","family":"Pan","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","year":"2015","journal-title":"Cadence SoC Encounter"},{"key":"ref38","year":"2015","journal-title":"Synopsys IC Compiler"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TCS.1981.1084903"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/2560519.2560523"},{"key":"ref31","author":"neapolitan","year":"2010","journal-title":"Foundations of Algorithms"},{"key":"ref30","year":"2015","journal-title":"Predictive Technology Model Ver 2 1"},{"key":"ref37","doi-asserted-by":"crossref","first-page":"117","DOI":"10.1109\/DATE.2000.840026","article-title":"Faster optimal single-row placement with fixed ordering","author":"brenner","year":"2000","journal-title":"Proc Design Autom Testing of Europe (DATE)"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.1999.760005"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.1998.655875"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2005.1560188"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2288678"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429396"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488818"},{"key":"ref13","article-title":"Triple patterning lithography (TPL) layout decomposition using end-cutting","volume":"8684","author":"yu","year":"2013","journal-title":"Proc SPIE"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691114"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691115"},{"key":"ref16","doi-asserted-by":"crossref","DOI":"10.1117\/12.879643","article-title":"Decomposition-aware standard cell design flows to enable double-patterning technology","volume":"7974","author":"liebmann","year":"2011","journal-title":"Proc SPIE"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.2006148"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2017268"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2049041"},{"key":"ref28","year":"2015","journal-title":"NanGate FreePDK45 Generic Open Cell Library"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2179041"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2232710"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429430"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1117\/12.920028"},{"key":"ref29","year":"2008","journal-title":"Calibre Verification User Manual"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1038\/nphoton.2009.251"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1117\/12.916636"},{"key":"ref7","doi-asserted-by":"crossref","DOI":"10.1117\/12.793116","article-title":"Comparison of triple-patterning decomposition algorithms using aperiodic tiling patterns","volume":"7028","author":"cork","year":"2008","journal-title":"Proc SPIE"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2276751"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105297"},{"key":"ref1","year":"2015","journal-title":"ITRS"},{"key":"ref20","article-title":"Self-aligned double patterning friendly configuration for standard cell library considering placement","volume":"8684","author":"gao","year":"2013","journal-title":"Proc SPIE"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5654225"},{"key":"ref21","article-title":"Multi-patterning lithography aware cell placement in integrated circuit design","author":"agarwal","year":"2013"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429408"},{"key":"ref23","first-page":"591","article-title":"Triple patterning aware routing and its comparison with double patterning aware routing in 14 nm technology","author":"ma","year":"2012","journal-title":"Proc IEEE\/ACM Design Autom Conf (DAC)"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2179039"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5654070"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/7088672\/07036058.pdf?arnumber=7036058","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,29]],"date-time":"2025-01-29T18:55:07Z","timestamp":1738176907000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7036058\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,5]]},"references-count":39,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2015.2401571","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,5]]}}}