{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T10:00:18Z","timestamp":1740132018695,"version":"3.37.3"},"reference-count":36,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2017,2,1]],"date-time":"2017-02-01T00:00:00Z","timestamp":1485907200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100004543","name":"Chinese Scholarship Council","doi-asserted-by":"publisher","award":["2010611016"],"award-info":[{"award-number":["2010611016"]}],"id":[{"id":"10.13039\/501100004543","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2017,2]]},"DOI":"10.1109\/tcad.2016.2570680","type":"journal-article","created":{"date-parts":[[2016,5,20]],"date-time":"2016-05-20T05:32:57Z","timestamp":1463722377000},"page":"285-298","source":"Crossref","is-referenced-by-count":4,"title":["Towards Maximum Utilization of Remained Bandwidth in Defected NoC Links"],"prefix":"10.1109","volume":"36","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-1862-2807","authenticated-orcid":false,"given":"Changlin","family":"Chen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yaowen","family":"Fu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sorin","family":"Cotofana","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.95"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/NCA.2010.14"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2011.61"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1016\/S0167-8191(97)00093-8"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.82"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/1921249.1921258"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2011.6085089"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2010.5647663"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2041851"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1155\/2007\/94676"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2010.24"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/NESEA.2012.6474016"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.38"},{"key":"ref16","first-page":"19","article-title":"HARAQ: Congestion-aware learning model for highly adaptive routing algorithm in on-chip networks","author":"ebrahimi","year":"2013","journal-title":"Proc IEEE\/ACM Int Symp Netw Chip"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cdt.2008.0082"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/169627.169835"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.907263"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/71.926168"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2006.46"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/1132952.1132953"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/12.589238"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2009.5161048"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2013.42"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.122"},{"article-title":"Benchmarking modern multiprocessors","year":"2011","author":"bienia","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.110"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2003.1195021"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MSP.2009.934110"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2013711"},{"article-title":"Survey of network-on-chip proposals","year":"2008","author":"salminen","key":"ref20"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024929"},{"journal-title":"Principles and Practices of Interconnection Networks","year":"2003","author":"dally","key":"ref21"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2014.70"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.891371"},{"key":"ref26","doi-asserted-by":"crossref","first-page":"620","DOI":"10.1109\/TPDS.1996.4772741","article-title":"Fault-tolerant wormhole routing in meshes without virtual channels","volume":"7","author":"glass","year":"1996","journal-title":"IEEE Trans Parallel Distrib Syst"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/NoCS.2013.6558401"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/7823113\/07473926.pdf?arnumber=7473926","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:11:49Z","timestamp":1642003909000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7473926\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,2]]},"references-count":36,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2016.2570680","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"type":"print","value":"0278-0070"},{"type":"electronic","value":"1937-4151"}],"subject":[],"published":{"date-parts":[[2017,2]]}}}