{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,10]],"date-time":"2025-04-10T15:47:01Z","timestamp":1744300021213,"version":"3.37.3"},"reference-count":20,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2017,7,1]],"date-time":"2017-07-01T00:00:00Z","timestamp":1498867200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100000266","name":"U.K. EPSRC","doi-asserted-by":"publisher","award":["EP\/I012036\/1","EP\/N031768\/1","EP\/L00058X\/1"],"award-info":[{"award-number":["EP\/I012036\/1","EP\/N031768\/1","EP\/L00058X\/1"]}],"id":[{"id":"10.13039\/501100000266","id-type":"DOI","asserted-by":"publisher"}]},{"name":"European Union Horizon 2020 Research and Innovation Programme","award":["671653"],"award-info":[{"award-number":["671653"]}]},{"name":"Maxeler University Programme"},{"name":"Intel PSG"},{"DOI":"10.13039\/100014121","name":"Xilinx","doi-asserted-by":"crossref","id":[{"id":"10.13039\/100014121","id-type":"DOI","asserted-by":"crossref"}]},{"name":"HiPEAC NoE"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2017,7]]},"DOI":"10.1109\/tcad.2016.2618862","type":"journal-article","created":{"date-parts":[[2016,10,19]],"date-time":"2016-10-19T14:16:19Z","timestamp":1476886579000},"page":"1193-1202","source":"Crossref","is-referenced-by-count":3,"title":["Transparent In-Circuit Assertions for FPGAs"],"prefix":"10.1109","volume":"36","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-7670-116X","authenticated-orcid":false,"given":"Eddie","family":"Hung","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tim","family":"Todman","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wayne","family":"Luk","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2006.243776"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/43.273754"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/329166.329199"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2014.6927418"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/1950413.1950425"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1016\/j.entcs.2011.06.003"},{"journal-title":"GRLIB IP Core User&#x2019;s Manual","year":"2013","key":"ref16"},{"journal-title":"Advanced Synthesis Cookbook","year":"2011","key":"ref17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2011.44"},{"article-title":"SP 800-22 rev. 1a. a statistical test suite for random and pseudorandom number generators for cryptographic applications","year":"2010","author":"bassham","key":"ref19"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1155\/2011\/406857"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2013.6718324"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/43.945302"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2014.6927497"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2012.2183336"},{"key":"ref7","first-page":"28","article-title":"Using statistical assertions to guide self-adaptive systems","author":"todman","year":"2013","journal-title":"Proc Workshop Self Awareness Reconfig Syst (SRCS)"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/1950413.1950447"},{"journal-title":"IEEE Std 1850-2010 (Revision of IEEE Std1850-2005) - Redline 1850-2010","first-page":"1","year":"2010","key":"ref9"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2013.6645503"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2013.40"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/7951135\/07593313.pdf?arnumber=7593313","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:40:47Z","timestamp":1641987647000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7593313\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,7]]},"references-count":20,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2016.2618862","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"type":"print","value":"0278-0070"},{"type":"electronic","value":"1937-4151"}],"subject":[],"published":{"date-parts":[[2017,7]]}}}