{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,8,18]],"date-time":"2026-08-18T00:27:38Z","timestamp":1787012858006,"version":"3.56.0"},"reference-count":50,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2017,12,1]],"date-time":"2017-12-01T00:00:00Z","timestamp":1512086400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100001843","name":"Science and Engineering Research Board","doi-asserted-by":"publisher","award":["SR\/S3\/EECE\/0065\/2010"],"award-info":[{"award-number":["SR\/S3\/EECE\/0065\/2010"]}],"id":[{"id":"10.13039\/501100001843","id-type":"DOI","asserted-by":"publisher"}]},{"name":"University Grants Commission UGC Govt of India","award":["F1-17.1\/2013-14\/RGNF-2013-14-SC-WES-55803\/(SA-III\/"],"award-info":[{"award-number":["F1-17.1\/2013-14\/RGNF-2013-14-SC-WES-55803\/(SA-III\/"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2017,12]]},"DOI":"10.1109\/tcad.2017.2681062","type":"journal-article","created":{"date-parts":[[2017,3,10]],"date-time":"2017-03-10T21:23:40Z","timestamp":1489181020000},"page":"1940-1953","source":"Crossref","is-referenced-by-count":17,"title":["Synthesis Procedure of Configurable Building Block-Based Linear and Nonlinear Analog Circuits"],"prefix":"10.1109","volume":"36","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-5312-6633","authenticated-orcid":false,"given":"Mousumi","family":"Bhanja","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Baidya Nath","family":"Ray","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/OPTIM.2012.6231881"},{"key":"ref38","first-page":"494","article-title":"Design of OTA based field programmable analog array","author":"ray","year":"2000","journal-title":"Proc of VLSI Design"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/4.982418"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2406953"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2013.6658467"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/LASCAS.2011.5750274"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008210302367"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/TE.2008.916762"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2005697"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2005.853401"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126612500430"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.925819"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1007\/s10665-014-9696-3"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2418287"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/43.489099"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSEN.2014.2333538"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2005.859057"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2004.831426"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2004.823673"},{"key":"ref23","doi-asserted-by":"crossref","first-page":"929","DOI":"10.1109\/19.872910","article-title":"Testable design of multiple-stage OTA-C filters","volume":"49","author":"hsu","year":"2000","journal-title":"IEEE Trans Instrum Meas"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2011.2158713"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1016\/S1005-8885(09)60474-X"},{"key":"ref50","author":"kinget","year":"2013","journal-title":"Analog VLSI Integration of Massive Parallel Signal Processing Systems"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/43.998624"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2004.832713"},{"key":"ref40","first-page":"114","author":"allen","year":"2004","journal-title":"CMOS Analog Circuit Design"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2488482"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2379630"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2376987"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2081750"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.889371"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2396997"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1007\/s00034-010-9163-y"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1007\/s00034-009-9145-0"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/43.44506"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/4.44993"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/43.848091"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/43.370422"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/82.839663"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/43.372366"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2004.841599"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/81.736556"},{"key":"ref46","author":"schaumann","year":"1990","journal-title":"Design of Analog Filters Passive Active RC and Switched Capacitor"},{"key":"ref45","author":"schaumann","year":"2001","journal-title":"Design of Analog Filters"},{"key":"ref48","author":"toumazou","year":"1990","journal-title":"Analogue IC Design The Current-Mode Approach"},{"key":"ref47","author":"chua","year":"1987","journal-title":"Linear and Nonlinear Circuits"},{"key":"ref42","author":"proakis","year":"1989","journal-title":"Digital Communications"},{"key":"ref41","author":"sedra","year":"1991","journal-title":"Microelectronic Circuits"},{"key":"ref44","doi-asserted-by":"crossref","DOI":"10.1007\/b101926","author":"su","year":"2002","journal-title":"Analog Filters"},{"key":"ref43","author":"kuo","year":"1962","journal-title":"Network Analysis and Synthesis"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/8114692\/07875395.pdf?arnumber=7875395","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:39:13Z","timestamp":1641987553000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7875395\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,12]]},"references-count":50,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2017.2681062","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,12]]}}}