{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,3]],"date-time":"2026-04-03T19:47:58Z","timestamp":1775245678815,"version":"3.50.1"},"reference-count":46,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2018,2]]},"DOI":"10.1109\/tcad.2017.2697964","type":"journal-article","created":{"date-parts":[[2017,4,25]],"date-time":"2017-04-25T18:41:08Z","timestamp":1493145668000},"page":"406-419","source":"Crossref","is-referenced-by-count":24,"title":["Global Routing With Timing Constraints"],"prefix":"10.1109","volume":"37","author":[{"given":"Stephan","family":"Held","sequence":"first","affiliation":[]},{"given":"Dirk","family":"Muller","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5473-899X","authenticated-orcid":false,"given":"Daniel","family":"Rotter","sequence":"additional","affiliation":[]},{"given":"Rudolf","family":"Scheifele","sequence":"additional","affiliation":[]},{"given":"Vera","family":"Traub","sequence":"additional","affiliation":[]},{"given":"Jens","family":"Vygen","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1145\/2966986.2967067"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/43.918209"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1007\/BF02579324"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1016\/S0166-218X(03)00445-1"},{"key":"ref31","article-title":"Elmore-Delay-optimale Steinerb&#x00E4;ume im VLSI-Design","author":"peyer","year":"2000"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2011.5722249"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1016\/j.amc.2014.11.062"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.1983.1270037"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/43.285250"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/276698.276868"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1063\/1.1697872"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1007\/s00453-016-0149-4"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1137\/0132071"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2442087.2442103"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-36694-9_20"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372556"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/43.663822"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1007\/s12532-016-0110-1"},{"key":"ref17","doi-asserted-by":"crossref","first-page":"596","DOI":"10.1145\/157485.165063","article-title":"an efficient timing-driven global routing algorithm","author":"huang","year":"1993","journal-title":"30th ACM\/IEEE Design Automation Conference"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"1025","DOI":"10.1109\/TCAD.2002.801083","article-title":"A timing-constrained simultaneous global routing algorithm","volume":"21","author":"hu","year":"2002","journal-title":"IEEE Trans Comput -Aided Design Integr Circuits Syst"},{"key":"ref19","doi-asserted-by":"crossref","first-page":"580","DOI":"10.1109\/TCSII.2009.2022203","article-title":"A fully polynomial-time approximation scheme for timing-constrained minimum cost layer assignment","volume":"56","author":"hu","year":"2009","journal-title":"IEEE Trans Circuits Syst II Exp Briefs"},{"key":"ref28","first-page":"480","article-title":"Optimizing yield in global routing","author":"m\u00fcller","year":"2006","journal-title":"Proc ICCAD"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1123008.1123032"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/SFCS.2000.892330"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/290179.290180"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/196244.196428"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1007\/s12532-011-0023-y"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/157485.164662"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-13915-9"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/43.476573"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2451916.2451942"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1361192.1361200"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2002.994986"},{"key":"ref46","first-page":"5439","article-title":"Multilevel timing-constrained full-chip routing in hierarchical quad-grid model","author":"yan","year":"2006","journal-title":"Proc ISCAS"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1137\/0130013"},{"key":"ref45","first-page":"683","article-title":"Timing-constrained congestion-driven global routing","author":"yan","year":"2004","journal-title":"Proc ASP DAC"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-2363-2"},{"key":"ref21","article-title":"Steiner routing based on Elmore delay model for minimizing maximum propagation delay","author":"kadodi","year":"1999"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1145\/196244.196432"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1007\/BF01294129"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1016\/S0167-9260(87)80003-2"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4684-2001-2_9"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.373"},{"key":"ref26","doi-asserted-by":"crossref","DOI":"10.1145\/1383369.1383381","article-title":"Approximation algorithms for a facility location problem with service capacities","volume":"4","author":"ma\u00dfberg","year":"2008","journal-title":"ACM Trans Algorithms"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-25960-2_24"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/1960397.1960411"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/8263325\/07911216.pdf?arnumber=7911216","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:24:52Z","timestamp":1642004692000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7911216\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,2]]},"references-count":46,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2017.2697964","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,2]]}}}