{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,21]],"date-time":"2025-11-21T11:26:24Z","timestamp":1763724384134,"version":"3.37.3"},"reference-count":46,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","award":["2502","2503"],"award-info":[{"award-number":["2502","2503"]}],"id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2018,2]]},"DOI":"10.1109\/tcad.2017.2706558","type":"journal-article","created":{"date-parts":[[2017,5,19]],"date-time":"2017-05-19T18:35:44Z","timestamp":1495218944000},"page":"499-511","source":"Crossref","is-referenced-by-count":10,"title":["Online Soft-Error Vulnerability Estimation for Memory Arrays and Logic Cores"],"prefix":"10.1109","volume":"37","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6915-6084","authenticated-orcid":false,"given":"Arunkumar","family":"Vijayan","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Saman","family":"Kiamehr","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mojtaba","family":"Ebrahimi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Krishnendu","family":"Chakrabarty","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mehdi B.","family":"Tahoori","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref39","DOI":"10.1109\/34.574797"},{"key":"ref38","first-page":"497","article-title":"Soft error derating computation in sequential circuits","author":"asadi","year":"2006","journal-title":"Proc IEEE\/ACM Int Conf Comput -Aided Design"},{"doi-asserted-by":"publisher","key":"ref33","DOI":"10.7873\/DATE.2015.0367"},{"doi-asserted-by":"publisher","key":"ref32","DOI":"10.1145\/2744769.2744923"},{"doi-asserted-by":"publisher","key":"ref31","DOI":"10.1109\/DATE.2009.5090770"},{"doi-asserted-by":"publisher","key":"ref30","DOI":"10.1109\/DFTVS.2005.61"},{"doi-asserted-by":"publisher","key":"ref37","DOI":"10.1109\/DFT.2015.7315165"},{"doi-asserted-by":"publisher","key":"ref36","DOI":"10.1007\/s11390-011-1150-7"},{"doi-asserted-by":"publisher","key":"ref35","DOI":"10.1109\/TC.2009.140"},{"key":"ref34","first-page":"1","article-title":"Mitigating multi-bit soft errors in L1 caches using last-store prediction","author":"gold","year":"2007","journal-title":"Proc Workshop Architectural Support Gigascale Integration"},{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/DATE.2011.5763020"},{"key":"ref40","volume":"1","author":"friedman","year":"2001","journal-title":"The Elements of Statistical Learning"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1145\/2830772.2830829"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1145\/1273440.1250726"},{"key":"ref13","article-title":"Quantized AVF: A means of capturing vulnerability variations over small windows of time","author":"biswas","year":"2009","journal-title":"System Effects of Logic Soft Errors II Workshop"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1145\/1273440.1250725"},{"doi-asserted-by":"publisher","key":"ref15","DOI":"10.1109\/ISCA.2008.9"},{"key":"ref16","first-page":"147","article-title":"Characterizing microarchitecture soft error vulnerability phase behavior","author":"fu","year":"2006","journal-title":"Proc IEEE MASCOTS"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1109\/INCoS.2011.63"},{"doi-asserted-by":"publisher","key":"ref18","DOI":"10.1109\/VTS.2016.7477301"},{"doi-asserted-by":"publisher","key":"ref19","DOI":"10.1109\/IOLTS.2011.5993833"},{"doi-asserted-by":"publisher","key":"ref28","DOI":"10.1109\/DATE.2009.5090716"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1145\/1065579.1065585"},{"doi-asserted-by":"publisher","key":"ref27","DOI":"10.1109\/DATE.2012.6176538"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/MM.2013.68"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/VTS.2015.7116254"},{"doi-asserted-by":"publisher","key":"ref29","DOI":"10.1145\/2463209.2488859"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/MICRO.2003.1253181"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/ISCA.2005.18"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1109\/TEST.2014.7035317"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/TCAD.2015.2422845"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1109\/ASPDAC.2013.6509664"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/IRPS.2011.5784522"},{"doi-asserted-by":"publisher","key":"ref46","DOI":"10.1145\/1816038.1816023"},{"key":"ref20","first-page":"1","article-title":"NSEU mitigation in avionics applications","author":"hu","year":"2010","journal-title":"XILINX Application Note XAPP197 v1 0 1"},{"key":"ref45","first-page":"2825","article-title":"Scikit-learn: Machine learning in Python","volume":"12","author":"pedregosa","year":"2011","journal-title":"J Mach Learn Res"},{"doi-asserted-by":"publisher","key":"ref22","DOI":"10.1145\/2897937.2897996"},{"doi-asserted-by":"publisher","key":"ref21","DOI":"10.1109\/IOLTS.2016.7604674"},{"doi-asserted-by":"publisher","key":"ref42","DOI":"10.1109\/72.991427"},{"doi-asserted-by":"publisher","key":"ref24","DOI":"10.1109\/TNS.2012.2218128"},{"doi-asserted-by":"publisher","key":"ref41","DOI":"10.1007\/BF00994018"},{"doi-asserted-by":"publisher","key":"ref23","DOI":"10.1109\/IRPS.2009.5173251"},{"year":"2016","journal-title":"Nangate 45 nm Open Cell Library v1 3","key":"ref44"},{"doi-asserted-by":"publisher","key":"ref26","DOI":"10.1109\/DSN.2008.4630080"},{"year":"2016","author":"li","journal-title":"A gentle introduction to gradient boosting","key":"ref43"},{"doi-asserted-by":"publisher","key":"ref25","DOI":"10.1109\/WWC.2001.990739"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/8263325\/07932190.pdf?arnumber=7932190","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:24:52Z","timestamp":1642004692000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7932190\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,2]]},"references-count":46,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2017.2706558","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"type":"print","value":"0278-0070"},{"type":"electronic","value":"1937-4151"}],"subject":[],"published":{"date-parts":[[2018,2]]}}}