{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,2]],"date-time":"2026-07-02T16:29:01Z","timestamp":1783009741300,"version":"3.54.5"},"reference-count":53,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T00:00:00Z","timestamp":1559347200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T00:00:00Z","timestamp":1559347200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T00:00:00Z","timestamp":1559347200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"ERC MultiTherman Project","award":["ERC-AdG-291125"],"award-info":[{"award-number":["ERC-AdG-291125"]}]},{"name":"OPRECOMP Project through the European Unions Horizon 2020 Research and Innovation Programme","award":["732631"],"award-info":[{"award-number":["732631"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2019,6]]},"DOI":"10.1109\/tcad.2018.2834397","type":"journal-article","created":{"date-parts":[[2018,5,8]],"date-time":"2018-05-08T18:55:19Z","timestamp":1525805719000},"page":"1095-1108","source":"Crossref","is-referenced-by-count":18,"title":["An Energy-Efficient Integrated Programmable Array Accelerator and Compilation Flow for Near-Sensor Ultralow Power Processing"],"prefix":"10.1109","volume":"38","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-7550-2641","authenticated-orcid":false,"given":"Satyajit","family":"Das","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8122-1192","authenticated-orcid":false,"given":"Kevin J. M.","family":"Martin","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0651-5393","authenticated-orcid":false,"given":"Davide","family":"Rossi","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7222-5271","authenticated-orcid":false,"given":"Philippe","family":"Coussy","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8068-3806","authenticated-orcid":false,"given":"Luca","family":"Benini","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2011.6132668"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1996.564808"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/RECONFIG.2017.8279789"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2015.2477841"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488757"},{"key":"ref30","first-page":"13","article-title":"Automatic nested loop acceleration on FPGAs using soft CGRA overlay","volume":"abs 1509 42","author":"liu","year":"2015","journal-title":"CoRR"},{"key":"ref37","first-page":"166","article-title":"DRESC: A retargetable compiler for coarse-grained reconfigurable architectures","author":"mei","year":"2002","journal-title":"Proc IEEE Int Conf Field Program Technol (FPT)"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2015.7393280"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/296399.296444"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/HPCC-CSS-ICESS.2015.139"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1007\/BF02575586"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/2656075.2656085"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1155\/2009\/518659"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2342509.2342513"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2002.1115363"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2010.5681452"},{"key":"ref22","year":"2005","journal-title":"TMS320C64x\/C64x+ DSP CPU and Instruction Set Reference Guide"},{"key":"ref21","first-page":"1367","article-title":"State-based full predication for low power coarse-grained reconfigurable architecture","author":"han","year":"2012","journal-title":"Proc Design Autom Test Eur Conf Exhibition (DATE)"},{"key":"ref24","first-page":"12","article-title":"Resource sharing and pipelining in coarse-grained reconfigurable architecture for domain-specific optimization","author":"kim","year":"2005","journal-title":"Proc Design Autom Test Europe"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/2629610"},{"key":"ref26","author":"lampret","year":"2003","journal-title":"OpenRISC 1000 Architecture Manual"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1166\/jolpe.2009.1008"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1145\/354880.354901"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2014.6927486"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.916616"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372624"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050238"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-6345-1_17"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454140"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2014.2360522"},{"key":"ref13","article-title":"Reconfigurable data path processor","author":"donohoe","year":"2005"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/AERO.2007.353105"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2701499"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2654506"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-SoC.2015.7314386"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/2.839324"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488756"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2009.5335665"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-71431-6_1"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/2655242"},{"key":"ref5","first-page":"i?362","article-title":"Mapping control intensive kernels onto coarse-grained reconfigurable array architecture","volume":"1","author":"chang","year":"2008","journal-title":"Proc Int SoC Design Conf"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2017.7858308"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333747"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/12.859540"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2016.54"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-SoC.2015.7314440"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2015.7393298"},{"key":"ref48","first-page":"377","article-title":"MuCCRA-3: A low power dynamically reconfigurable processor array","author":"saito","year":"2010","journal-title":"Proc Asia South Pacific Design Automat Conf"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2015.11.015"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/43.31522"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2011.38"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2011.5763085"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2014.6868652"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/8718432\/08355958.pdf?arnumber=8355958","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T21:14:52Z","timestamp":1657746892000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8355958\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,6]]},"references-count":53,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2018.2834397","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,6]]}}}