{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:57:02Z","timestamp":1759147022987,"version":"3.37.3"},"reference-count":32,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2019,8,1]],"date-time":"2019-08-01T00:00:00Z","timestamp":1564617600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,8,1]],"date-time":"2019-08-01T00:00:00Z","timestamp":1564617600000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,8,1]],"date-time":"2019-08-01T00:00:00Z","timestamp":1564617600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,8,1]],"date-time":"2019-08-01T00:00:00Z","timestamp":1564617600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"National Major Science and Technology Special Project of China","award":["2017ZX01028101-003"],"award-info":[{"award-number":["2017ZX01028101-003"]}]},{"DOI":"10.13039\/501100012166","name":"National Key Research and Development Program of China","doi-asserted-by":"crossref","award":["2016YFB0201304"],"award-info":[{"award-number":["2016YFB0201304"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61574046","61574044","61774045","61628402","91730303","91330201"],"award-info":[{"award-number":["61574046","61574044","61774045","61628402","91730303","91330201"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100010871","name":"Recruitment Program of Global Experts","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100010871","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["1115556","CCF-1604150"],"award-info":[{"award-number":["1115556","CCF-1604150"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003347","name":"Fudan University","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003347","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2019,8]]},"DOI":"10.1109\/tcad.2018.2848590","type":"journal-article","created":{"date-parts":[[2018,6,18]],"date-time":"2018-06-18T22:53:26Z","timestamp":1529362406000},"page":"1385-1398","source":"Crossref","is-referenced-by-count":15,"title":["Graph-Constrained Sparse Performance Modeling for Analog Circuit Optimization via SDP Relaxation"],"prefix":"10.1109","volume":"38","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-8742-687X","authenticated-orcid":false,"given":"Jun","family":"Tao","sequence":"first","affiliation":[]},{"given":"Yangfeng","family":"Su","sequence":"additional","affiliation":[]},{"given":"Dian","family":"Zhou","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8097-4053","authenticated-orcid":false,"given":"Xuan","family":"Zeng","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4510-2436","authenticated-orcid":false,"given":"Xin","family":"Li","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"CVX Matlab software for disciplined convex programming version 2 0 beta","year":"2013","author":"grant","key":"ref32"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2016.2543021"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2012.6330570"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1080\/00207217.2016.1138522"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.5755\/j01.eee.19.10.2464"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2729461"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/1065579.1065809"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/43.905671"},{"key":"ref15","first-page":"855","article-title":"Robust analog\/RF circuit design with projection-based posynomial modeling","author":"li","year":"2004","journal-title":"Proc Int Conf Comput -Aided Design"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2002.1012664"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2199115"},{"key":"ref18","first-page":"863","article-title":"Techniques for improving the accuracy of geometric-programming based analog circuit design optimization","author":"kim","year":"2004","journal-title":"Proc Int Conf Comput -Aided Design"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1002\/cta.525"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1630009"},{"key":"ref4","first-page":"944","article-title":"Simultaneous multi-topology multi-objective sizing across thousands of analog circuit topologies","author":"mcconaghy","year":"2007","journal-title":"Proc Design Autom Conf"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391482"},{"key":"ref3","first-page":"594","article-title":"A statistical optimization-based approach for automated sizing of analog cells","author":"medeiro","year":"1994","journal-title":"Proc Int Conf Comput -Aided Design"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1016\/j.amc.2013.07.059"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2061292"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2016.04.004"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126618500299"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2016.2564362"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.889371"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1080\/02564602.2016.1276869"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/5.899053"},{"key":"ref20","first-page":"1","article-title":"Enabling efficient analog synthesis by coupling sparse regression and polynomial optimization","author":"wang","year":"2014","journal-title":"Proc Design Autom Conf"},{"key":"ref22","first-page":"1423","article-title":"PolyGP: Improving GP-Based Analog Optimization through Accurate High-Order Monomials and Semidefinite Relaxation","author":"ye wang","year":"2016","journal-title":"Design Automation Test in Europe Conference Exhibition (DATE)"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2016.7428068"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1137\/050623802"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1137\/S1052623400366802"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1137\/130915261"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/1377612.1377619"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielaam\/43\/8765487\/8387516-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/8765487\/08387516.pdf?arnumber=8387516","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,13]],"date-time":"2022-07-13T20:57:28Z","timestamp":1657745848000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8387516\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,8]]},"references-count":32,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2018.2848590","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"type":"print","value":"0278-0070"},{"type":"electronic","value":"1937-4151"}],"subject":[],"published":{"date-parts":[[2019,8]]}}}