{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T16:04:09Z","timestamp":1780675449484,"version":"3.54.1"},"reference-count":50,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2019,12,1]],"date-time":"2019-12-01T00:00:00Z","timestamp":1575158400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,12,1]],"date-time":"2019-12-01T00:00:00Z","timestamp":1575158400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,12,1]],"date-time":"2019-12-01T00:00:00Z","timestamp":1575158400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"INAE Chair Professorship"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2019,12]]},"DOI":"10.1109\/tcad.2018.2878169","type":"journal-article","created":{"date-parts":[[2018,10,25]],"date-time":"2018-10-25T17:37:00Z","timestamp":1540489020000},"page":"2343-2356","source":"Crossref","is-referenced-by-count":15,"title":["Predicting ${X}$ -Sensitivity of Circuit-Inputs on Test-Coverage: A Machine-Learning Approach"],"prefix":"10.1109","volume":"38","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6453-4971","authenticated-orcid":false,"given":"Manjari","family":"Pradhan","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Bhaswar B.","family":"Bhattacharya","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4475-6435","authenticated-orcid":false,"given":"Krishnendu","family":"Chakrabarty","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Bhargab B.","family":"Bhattacharya","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1002\/0470055464"},{"key":"ref38","author":"montgomery","year":"2012","journal-title":"Introduction to Linear Regression Analysis"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1989.100747"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1980.1585245"},{"key":"ref31","first-page":"318","article-title":"An exact analysis for efficient computation of random pattern testability in combinational circuits","author":"seth","year":"1986","journal-title":"Dig Papers Int Symp Fault Tolerant Comput Syst (FTCS)"},{"key":"ref30","first-page":"220","article-title":"PREDICT&#x2014;Probabilistic estimation of digital circuit testability","author":"seth","year":"1985","journal-title":"Dig Papers Int Symp Fault Tolerant Comput Syst (FTCS)"},{"key":"ref37","author":"cormen","year":"2001","journal-title":"Introduction to Algorithms"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/54.867894"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/368996.369025"},{"key":"ref34","year":"2014","journal-title":"TetraMAX"},{"key":"ref28","article-title":"Automatic fault-testing of logic blocks using internal at-speed logic-BIST","author":"mushirabad","year":"2008"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.32697\/integritas.v4i2.179"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1007\/BF02945770"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228461"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2440315"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2006.260962"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2193579"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2159116"},{"key":"ref24","article-title":"Compacting test responses using X-driven compactor","author":"wang","year":"2010"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2214479"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2284012"},{"key":"ref25","article-title":"Test response compaction in the presence of many unknowns","author":"wang","year":"2009","journal-title":"Proc VTTW"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1016\/j.eswa.2006.01.054"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1353629.1353654"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593145"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1023\/B:STCO.0000035301.49549.88"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2272540"},{"key":"ref13","first-page":"404","article-title":"The complexity of accurate logic simulation","author":"chang","year":"1987","journal-title":"Proc ICCAD"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1989.76899"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/2611760"},{"key":"ref16","first-page":"108","article-title":"Enhanced 3-valued logic\/fault simulation for full scan circuits using implicit logic values","author":"kajihara","year":"2004","journal-title":"Proc ETS"},{"key":"ref17","author":"wang","year":"2006","journal-title":"VLSI Test Principles and Architectures Design for Testability (Systems on Silicon)"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2003.1270904"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2005.81"},{"key":"ref4","first-page":"972","article-title":"Accurate CEGAR-Based ATPG in Presence of Unknown Values for Large Industrial Designs","author":"karsten scheibler","year":"2016","journal-title":"Design Automation Test in Europe Conference Exhibition (DATE)"},{"key":"ref3","year":"2017","journal-title":"User Interview How Metal-Only ECOs Save Full Silicon Respins"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041774"},{"key":"ref5","first-page":"255","article-title":"On output response compression in the presence of unknown output values","author":"pomeranz","year":"2002","journal-title":"Proc DAC"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2008.4700646"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2005.863742"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1016\/j.neunet.2017.07.018"},{"key":"ref9","first-page":"1","article-title":"A configurable bus-tracer for error reproduction in post-silicon validation","author":"chen","year":"2013","journal-title":"Proc VLSI-DAT"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1137\/S0895480102412856"},{"key":"ref45","first-page":"2825","article-title":"Scikit-learn: Machine learning in Python","volume":"12","author":"pedregosa","year":"2011","journal-title":"J Mach Learn Res"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4899-4541-9"},{"key":"ref47","doi-asserted-by":"crossref","first-page":"262","DOI":"10.1111\/j.2517-6161.1977.tb01624.x","article-title":"Spearman&#x2019;s footrule as a measure of disarray","volume":"39","author":"diaconis","year":"1977","journal-title":"J Roy Statist Soc Series B (Methodol )"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1016\/S0893-6080(03)00169-2"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-2440-0"},{"key":"ref44","year":"2015","journal-title":"Graphics Tools"},{"key":"ref43","author":"hastie","year":"2009","journal-title":"The Elements of Statistical Learning Data Mining Inference and Prediction"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/8907512\/08509151.pdf?arnumber=8509151","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,4,3]],"date-time":"2026-04-03T21:49:57Z","timestamp":1775252997000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8509151\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,12]]},"references-count":50,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2018.2878169","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"value":"0278-0070","type":"print"},{"value":"1937-4151","type":"electronic"}],"subject":[],"published":{"date-parts":[[2019,12]]}}}