{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T12:03:05Z","timestamp":1759147385447,"version":"3.37.3"},"reference-count":33,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2020,2,1]],"date-time":"2020-02-01T00:00:00Z","timestamp":1580515200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,2,1]],"date-time":"2020-02-01T00:00:00Z","timestamp":1580515200000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,2,1]],"date-time":"2020-02-01T00:00:00Z","timestamp":1580515200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,2,1]],"date-time":"2020-02-01T00:00:00Z","timestamp":1580515200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CCF-1350680"],"award-info":[{"award-number":["CCF-1350680"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100008109","name":"University of Notre Dame","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100008109","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61601406"],"award-info":[{"award-number":["61601406"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2020,2]]},"DOI":"10.1109\/tcad.2018.2887053","type":"journal-article","created":{"date-parts":[[2018,12,14]],"date-time":"2018-12-14T22:12:54Z","timestamp":1544825574000},"page":"281-293","source":"Crossref","is-referenced-by-count":16,"title":["Dynamic Frequency Scaling Aware Opportunistic Through-Silicon-Via Inductor Utilization in Resonant Clocking"],"prefix":"10.1109","volume":"39","author":[{"given":"Umamaheswara Rao","family":"Tida","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2610-7522","authenticated-orcid":false,"given":"Cheng","family":"Zhuo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7548-4116","authenticated-orcid":false,"given":"Leibo","family":"Liu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yiyu","family":"Shi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.893576"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2009.4796477"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2014.7001435"},{"key":"ref30","first-page":"571","article-title":"‘Green’ on-chip inductors in three-dimensional integrated circuits","author":"tida","year":"2014","journal-title":"Proc IEEE Comput Soc Annu Symp VLSI (ISVLSI)"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2011.5937788"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-24154-3_27"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2012.2190671"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2218068"},{"key":"ref14","first-page":"322c","article-title":"Resonant clock mega-mesh for the IBM z13™","author":"shan","year":"2015","journal-title":"Proc Symp VLSI Circuits (VLSI Circuits)"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2015.7168905"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2016.2543022"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/1283780.1283790"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2010.5457086"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2065990"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/2637481"},{"key":"ref4","first-page":"868","article-title":"Theoretical and practical limits of dynamic voltage scaling","author":"bo zhai","year":"2004","journal-title":"Proceedings 41st Design Automation Conference 2004 DAC"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240829"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.1998.655933"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/4.962285"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/CSTIC.2016.7463922"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.818299"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICEPT-HDP.2012.6474561"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2004.1332734"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/1165573.1165589"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2003.1240902"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2834438"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2012.6176969"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2010.5490761"},{"article-title":"Design guide for CMOS process on-chip 3D inductor using thru-wafer vias","year":"2011","author":"vanackern","key":"ref21"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/VLSISoC.2011.6081657"},{"article-title":"Interleaved three-dimensional on-chip differential inductors and transformers","year":"2012","author":"huang","key":"ref23"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2014.6742994"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2338862"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/43\/8964044\/8576655-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/43\/8964044\/08576655.pdf?arnumber=8576655","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,4,27]],"date-time":"2022-04-27T14:07:07Z","timestamp":1651068427000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8576655\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,2]]},"references-count":33,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2018.2887053","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"type":"print","value":"0278-0070"},{"type":"electronic","value":"1937-4151"}],"subject":[],"published":{"date-parts":[[2020,2]]}}}